diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-09-18 17:44:36 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:08 -0500 |
commit | a982fab35152126e1ea072e40441a7e869bbbfff (patch) | |
tree | b4c1c3f5a66827be7bd322202d5012a8be47ca90 /drivers/gpu | |
parent | 520b461aa7b1befdeee9d4226904f2a1ed370e82 (diff) |
gpu: nvgpu: gp10b: Fix pagepool max size
If pagepool size equals max we should use zero. Add the comparison
to do that.
Bug 1686189
Change-Id: I15bd43663550b1089a726c0256b89f849c193e21
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/801526
(cherry picked from commit 9d89ea5ba345b19d2cff86130ba9d3c4c5f07e6e)
Reviewed-on: http://git-master/r/815681
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gr_gp10b.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index d61ac5bb..c5f45816 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -684,6 +684,10 @@ static void gr_gp10b_update_ctxsw_preemption_mode(struct gk20a *g, | |||
684 | (u64_hi32(gr_ctx->t18x.pagepool_ctxsw_buffer.gpu_va) << | 684 | (u64_hi32(gr_ctx->t18x.pagepool_ctxsw_buffer.gpu_va) << |
685 | (32 - gr_scc_pagepool_base_addr_39_8_align_bits_v())); | 685 | (32 - gr_scc_pagepool_base_addr_39_8_align_bits_v())); |
686 | size = gr_ctx->t18x.pagepool_ctxsw_buffer.size; | 686 | size = gr_ctx->t18x.pagepool_ctxsw_buffer.size; |
687 | |||
688 | if (size == g->ops.gr.pagepool_default_size(g)) | ||
689 | size = gr_scc_pagepool_total_pages_hwmax_v(); | ||
690 | |||
687 | g->ops.gr.commit_global_pagepool(g, ch_ctx, addr, size, true); | 691 | g->ops.gr.commit_global_pagepool(g, ch_ctx, addr, size, true); |
688 | 692 | ||
689 | addr = (u64_lo32(gr_ctx->t18x.spill_ctxsw_buffer.gpu_va) >> | 693 | addr = (u64_lo32(gr_ctx->t18x.spill_ctxsw_buffer.gpu_va) >> |