video: tegra: host: gk20a: reorder free_irq

Free IRQs before the various subunits are suspended. This is to prevent
potential races between the IRQ thread and the suspend routine.

Bug 1437749

Change-Id: Iffef918feecae0b256be96efd02b01b2677c225d
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 8 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index ad35c9ae..a144e75d 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -755,14 +755,6 @@ static int gk20a_pm_prepare_poweroff(struct device *_dev)
         if (!g->power_on)
                 return 0;
 
-        ret |= gk20a_channel_suspend(g);
-
-        /* disable elpg before gr or fifo suspend */
-        ret |= gk20a_pmu_destroy(g);
-        ret |= gk20a_gr_suspend(g);
-        ret |= gk20a_mm_suspend(g);
-        ret |= gk20a_fifo_suspend(g);
-
         /*
          * After this point, gk20a interrupts should not get
          * serviced.
@@ -773,6 +765,14 @@ static int gk20a_pm_prepare_poweroff(struct device *_dev)
                 g->irq_requested = false;
         }
 
+        ret |= gk20a_channel_suspend(g);
+
+        /* disable elpg before gr or fifo suspend */
+        ret |= gk20a_pmu_destroy(g);
+        ret |= gk20a_gr_suspend(g);
+        ret |= gk20a_mm_suspend(g);
+        ret |= gk20a_fifo_suspend(g);
+
         /* Disable GPCPLL */
         ret |= gk20a_suspend_clk_support(g);
         g->power_on = false;