gpu: nvpug: add hal func get_gpc_tpc_mask

Retrieve which TPC is floorswept.

Bug 1450798

Change-Id: I3ea60703695448c68cd3435f443b280d5b2f0995
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/403876
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

3 files changed, 15 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 3d93ccde..edf1d548 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -130,6 +130,7 @@ struct gpu_ops {
                                 struct gk20a_ctxsw_ucode_segments *segments,
                                 u32 reg_offset);
                 int (*load_ctxsw_ucode)(struct gk20a *g);
+                u32 (*get_gpc_tpc_mask)(struct gk20a *g, u32 gpc_index);
         } gr;
         const char *name;
         struct {
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 8d35dd80..3298a383 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -1347,6 +1347,12 @@ static int gr_gk20a_setup_alpha_beta_tables(struct gk20a *g,
         return 0;
 }
 
+static u32 gr_gk20a_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
+{
+        /* One TPC for gk20a */
+        return 0x1;
+}
+
 static int gr_gk20a_ctx_state_floorsweep(struct gk20a *g)
 {
         struct gr_gk20a *gr = &g->gr;
@@ -3071,6 +3077,7 @@ static int gr_gk20a_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
         }
 
         gr->gpc_tpc_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
+        gr->gpc_tpc_mask = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
         gr->gpc_zcb_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
         gr->gpc_ppc_count = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
         gr->pes_tpc_count[0] = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
@@ -3100,6 +3107,11 @@ static int gr_gk20a_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
 
                 gr->gpc_ppc_count[gpc_index] = gr->pe_count_per_gpc;
                 gr->ppc_count += gr->gpc_ppc_count[gpc_index];
+
+                if (g->ops.gr.get_gpc_tpc_mask)
+                        gr->gpc_tpc_mask[gpc_index] =
+                                g->ops.gr.get_gpc_tpc_mask(g, gpc_index);
+
                 for (pes_index = 0; pes_index < gr->pe_count_per_gpc; pes_index++) {
 
                         tmp = gk20a_readl(g,
@@ -6995,4 +7007,5 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
         gops->gr.setup_alpha_beta_tables = gr_gk20a_setup_alpha_beta_tables;
         gops->gr.falcon_load_ucode = gr_gk20a_load_ctxsw_ucode_segments;
         gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode;
+        gops->gr.get_gpc_tpc_mask = gr_gk20a_get_gpc_tpc_mask;
 }
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index d4f7bc70..f60afd58 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -227,6 +227,7 @@ struct gr_gk20a {
         u32 *gpc_ppc_count;
         u32 tpc_count;
         u32 *gpc_tpc_count;
+        u32 *gpc_tpc_mask;
         u32 zcb_count;
         u32 *gpc_zcb_count;
         u32 *pes_tpc_count[2];