gpu: nvgpu: fix TSG abort sequence

In gk20a_fifo_abort_tsg(), we loop through channels of
TSG and call gk20a_channel_abort() for each channel

This is incorrect since we disable and preempt each
channel separately, whereas we should disable all channels
at once and use TSG specific API to preempt TSG

Fix this with below sequence :
- gk20a_disable_tsg() to disable all channels
- preempt tsg if required
- for each channel in TSG
  - set has_timedout flag
  - call gk20a_channel_abort_clean_up() to clean up channel state

Also, separate out common gk20a_channel_abort_clean_up() API
which can be called from both channel and TSG abort routines

In gk20a_channel_abort(), call gk20a_fifo_abort_tsg() if the
channel is part of TSG

Add new argument "preempt" to gk20a_fifo_abort_tsg() and
preempt TSG if flag is set

Bug 200205041

Change-Id: I4eff5394d26fbb53996f2d30b35140b75450f338
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1157190
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 files changed, 34 insertions, 17 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index b1d9fa55..3159f026 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -443,21 +443,11 @@ int gk20a_disable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch)
         return 0;
 }
 
-void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt)
+void gk20a_channel_abort_clean_up(struct channel_gk20a *ch)
 {
         struct channel_gk20a_job *job, *n;
         bool released_job_semaphore = false;
 
-        gk20a_dbg_fn("");
-
-        /* make sure new kickoffs are prevented */
-        ch->has_timedout = true;
-
-        ch->g->ops.fifo.disable_channel(ch);
-
-        if (channel_preempt)
-                gk20a_fifo_preempt(ch->g, ch);
-
         /* ensure no fences are pending */
         mutex_lock(&ch->sync_lock);
         if (ch->sync)
@@ -481,6 +471,24 @@ void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt)
         gk20a_channel_update(ch, 0);
 }
 
+void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt)
+{
+        gk20a_dbg_fn("");
+
+        if (gk20a_is_channel_marked_as_tsg(ch))
+                return gk20a_fifo_abort_tsg(ch->g, ch->tsgid, channel_preempt);
+
+        /* make sure new kickoffs are prevented */
+        ch->has_timedout = true;
+
+        ch->g->ops.fifo.disable_channel(ch);
+
+        if (channel_preempt)
+                ch->g->ops.fifo.preempt_channel(ch->g, ch->hw_chid);
+
+        gk20a_channel_abort_clean_up(ch);
+}
+
 int gk20a_wait_channel_idle(struct channel_gk20a *ch)
 {
         bool channel_idle = false;
@@ -1714,7 +1722,7 @@ static void gk20a_channel_timeout_handler(struct work_struct *work)
                         struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid];
 
                         gk20a_fifo_set_ctx_mmu_error_tsg(g, tsg);
-                        gk20a_fifo_abort_tsg(g, ch->tsgid);
+                        gk20a_fifo_abort_tsg(g, ch->tsgid, false);
                 } else {
                         gk20a_fifo_set_ctx_mmu_error_ch(g, ch);
                         gk20a_channel_abort(ch, false);
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index b1355f92..29a13d24 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -212,6 +212,7 @@ bool gk20a_channel_update_and_check_timeout(struct channel_gk20a *ch,
                                             u32 timeout_delta_ms);
 void gk20a_disable_channel(struct channel_gk20a *ch);
 void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt);
+void gk20a_channel_abort_clean_up(struct channel_gk20a *ch);
 int gk20a_channel_finish(struct channel_gk20a *ch, unsigned long timeout);
 void gk20a_set_error_notifier(struct channel_gk20a *ch, __u32 error);
 void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events);
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index f8382afe..17efe5ca 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -953,15 +953,23 @@ bool gk20a_fifo_set_ctx_mmu_error_tsg(struct gk20a *g,
         return ret;
 }
 
-void gk20a_fifo_abort_tsg(struct gk20a *g, u32 tsgid)
+void gk20a_fifo_abort_tsg(struct gk20a *g, u32 tsgid, bool preempt)
 {
         struct tsg_gk20a *tsg = &g->fifo.tsg[tsgid];
         struct channel_gk20a *ch;
 
+        gk20a_dbg_fn("");
+
+        gk20a_disable_tsg(tsg);
+
+        if (preempt)
+                g->ops.fifo.preempt_tsg(g, tsgid);
+
         mutex_lock(&tsg->ch_list_lock);
         list_for_each_entry(ch, &tsg->ch_list, ch_entry) {
                 if (gk20a_channel_get(ch)) {
-                        gk20a_channel_abort(ch, false);
+                        ch->has_timedout = true;
+                        gk20a_channel_abort_clean_up(ch);
                         gk20a_channel_put(ch);
                 }
         }
@@ -1129,7 +1137,7 @@ static bool gk20a_fifo_handle_mmu_fault(
                                 verbose =
                                        gk20a_fifo_set_ctx_mmu_error_tsg(g, tsg);
 
-                        gk20a_fifo_abort_tsg(g, tsg->tsgid);
+                        gk20a_fifo_abort_tsg(g, tsg->tsgid, false);
 
                         /* put back the ref taken early above */
                         if (referenced_channel)
@@ -1324,7 +1332,7 @@ void gk20a_fifo_recover_tsg(struct gk20a *g, u32 tsgid, bool verbose)
                 if (gk20a_fifo_set_ctx_mmu_error_tsg(g, tsg))
                         gk20a_debug_dump(g->dev);
 
-                gk20a_fifo_abort_tsg(g, tsgid);
+                gk20a_fifo_abort_tsg(g, tsgid, false);
         }
 
         gr_gk20a_enable_ctxsw(g);
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index 986db4b1..5fb5f550 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -207,7 +207,7 @@ u32 gk20a_fifo_get_failing_engine_data(struct gk20a *g,
                 int *__id, bool *__is_tsg);
 bool gk20a_fifo_set_ctx_mmu_error_tsg(struct gk20a *g,
                 struct tsg_gk20a *tsg);
-void gk20a_fifo_abort_tsg(struct gk20a *g, u32 tsgid);
+void gk20a_fifo_abort_tsg(struct gk20a *g, u32 tsgid, bool preempt);
 bool gk20a_fifo_set_ctx_mmu_error_ch(struct gk20a *g,
                 struct channel_gk20a *ch);