diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2017-02-01 10:05:48 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-02-09 16:44:31 -0500 |
commit | 8afd83238a9676f6737f24269a99c79071debdc2 (patch) | |
tree | 7708e8b561bedd2294bb8a19ffa898215934c468 /drivers/gpu | |
parent | de2dfd0c1ee5249f39ff58ce81cbdad0a5ad8cca (diff) |
gpu: nvgpu: PMU ACR interface header reorg
Moved ACR interface from pmu_api.h to
gpmuif_acr.h header file
gpmuif_acr.h - PMU Command/Message Interfaces for
Access Control Region (ACR)
Jira NVGPU-19
Change-Id: Ic37ff3f4ca069aa4bdd6729bbfccc00e15185b02
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1297369
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_api.h | 88 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmuif/gpmuif_acr.h | 104 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h | 1 |
4 files changed, 105 insertions, 98 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_api.h b/drivers/gpu/nvgpu/gk20a/pmu_api.h index 4d249524..ad8a6903 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_api.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_api.h | |||
@@ -17,94 +17,6 @@ | |||
17 | #include <nvgpu/flcnif_cmn.h> | 17 | #include <nvgpu/flcnif_cmn.h> |
18 | #include "pmuif/gpmuif_pg_rppg.h" | 18 | #include "pmuif/gpmuif_pg_rppg.h" |
19 | 19 | ||
20 | /* ACR Commands/Message structures */ | ||
21 | |||
22 | enum { | ||
23 | PMU_ACR_CMD_ID_INIT_WPR_REGION = 0x0, | ||
24 | PMU_ACR_CMD_ID_BOOTSTRAP_FALCON, | ||
25 | PMU_ACR_CMD_ID_RESERVED, | ||
26 | PMU_ACR_CMD_ID_BOOTSTRAP_MULTIPLE_FALCONS, | ||
27 | }; | ||
28 | |||
29 | /* | ||
30 | * Initializes the WPR region details | ||
31 | */ | ||
32 | struct pmu_acr_cmd_init_wpr_details { | ||
33 | u8 cmd_type; | ||
34 | u32 regionid; | ||
35 | u32 wproffset; | ||
36 | |||
37 | }; | ||
38 | |||
39 | /* | ||
40 | * falcon ID to bootstrap | ||
41 | */ | ||
42 | struct pmu_acr_cmd_bootstrap_falcon { | ||
43 | u8 cmd_type; | ||
44 | u32 flags; | ||
45 | u32 falconid; | ||
46 | }; | ||
47 | |||
48 | /* | ||
49 | * falcon ID to bootstrap | ||
50 | */ | ||
51 | struct pmu_acr_cmd_bootstrap_multiple_falcons { | ||
52 | u8 cmd_type; | ||
53 | u32 flags; | ||
54 | u32 falconidmask; | ||
55 | u32 usevamask; | ||
56 | struct falc_u64 wprvirtualbase; | ||
57 | }; | ||
58 | |||
59 | #define PMU_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_NO 1 | ||
60 | #define PMU_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_YES 0 | ||
61 | |||
62 | |||
63 | struct pmu_acr_cmd { | ||
64 | union { | ||
65 | u8 cmd_type; | ||
66 | struct pmu_acr_cmd_bootstrap_falcon bootstrap_falcon; | ||
67 | struct pmu_acr_cmd_init_wpr_details init_wpr; | ||
68 | struct pmu_acr_cmd_bootstrap_multiple_falcons boot_falcons; | ||
69 | }; | ||
70 | }; | ||
71 | |||
72 | /* acr messages */ | ||
73 | |||
74 | /* | ||
75 | * returns the WPR region init information | ||
76 | */ | ||
77 | #define PMU_ACR_MSG_ID_INIT_WPR_REGION 0 | ||
78 | |||
79 | /* | ||
80 | * Returns the Bootstrapped falcon ID to RM | ||
81 | */ | ||
82 | #define PMU_ACR_MSG_ID_BOOTSTRAP_FALCON 1 | ||
83 | |||
84 | /* | ||
85 | * Returns the WPR init status | ||
86 | */ | ||
87 | #define PMU_ACR_SUCCESS 0 | ||
88 | #define PMU_ACR_ERROR 1 | ||
89 | |||
90 | /* | ||
91 | * PMU notifies about bootstrap status of falcon | ||
92 | */ | ||
93 | struct pmu_acr_msg_bootstrap_falcon { | ||
94 | u8 msg_type; | ||
95 | union { | ||
96 | u32 errorcode; | ||
97 | u32 falconid; | ||
98 | }; | ||
99 | }; | ||
100 | |||
101 | struct pmu_acr_msg { | ||
102 | union { | ||
103 | u8 msg_type; | ||
104 | struct pmu_acr_msg_bootstrap_falcon acrmsg; | ||
105 | }; | ||
106 | }; | ||
107 | /*---------------------------------------------------------*/ | ||
108 | /* FECS mem override command*/ | 20 | /* FECS mem override command*/ |
109 | 21 | ||
110 | #define PMU_LRF_TEX_LTC_DRAM_CMD_ID_EN_DIS 0 | 22 | #define PMU_LRF_TEX_LTC_DRAM_CMD_ID_EN_DIS 0 |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 87246f42..2f679970 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -124,16 +124,6 @@ struct pmu_ucode_desc_v1 { | |||
124 | u32 compressed; | 124 | u32 compressed; |
125 | }; | 125 | }; |
126 | 126 | ||
127 | /***************************** ACR ERROR CODES ******************************/ | ||
128 | /*! | ||
129 | * Error codes used in PMU-ACR Task | ||
130 | * | ||
131 | * LSF_ACR_INVALID_TRANSCFG_SETUP : Indicates that TRANSCFG Setup is not valid | ||
132 | * MAILBOX1 returns the CTXDMA ID of invalid setup | ||
133 | * | ||
134 | */ | ||
135 | #define ACR_ERROR_INVALID_TRANSCFG_SETUP (0xAC120001) | ||
136 | |||
137 | #define PMU_PGENG_GR_BUFFER_IDX_INIT (0) | 127 | #define PMU_PGENG_GR_BUFFER_IDX_INIT (0) |
138 | #define PMU_PGENG_GR_BUFFER_IDX_ZBC (1) | 128 | #define PMU_PGENG_GR_BUFFER_IDX_ZBC (1) |
139 | #define PMU_PGENG_GR_BUFFER_IDX_FECS (2) | 129 | #define PMU_PGENG_GR_BUFFER_IDX_FECS (2) |
diff --git a/drivers/gpu/nvgpu/pmuif/gpmuif_acr.h b/drivers/gpu/nvgpu/pmuif/gpmuif_acr.h new file mode 100644 index 00000000..440ffbaa --- /dev/null +++ b/drivers/gpu/nvgpu/pmuif/gpmuif_acr.h | |||
@@ -0,0 +1,104 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | #ifndef _GPMUIFACR_H_ | ||
14 | #define _GPMUIFACR_H_ | ||
15 | |||
16 | /* ACR Commands/Message structures */ | ||
17 | |||
18 | enum { | ||
19 | PMU_ACR_CMD_ID_INIT_WPR_REGION = 0x0, | ||
20 | PMU_ACR_CMD_ID_BOOTSTRAP_FALCON, | ||
21 | PMU_ACR_CMD_ID_RESERVED, | ||
22 | PMU_ACR_CMD_ID_BOOTSTRAP_MULTIPLE_FALCONS, | ||
23 | }; | ||
24 | |||
25 | /* | ||
26 | * Initializes the WPR region details | ||
27 | */ | ||
28 | struct pmu_acr_cmd_init_wpr_details { | ||
29 | u8 cmd_type; | ||
30 | u32 regionid; | ||
31 | u32 wproffset; | ||
32 | |||
33 | }; | ||
34 | |||
35 | /* | ||
36 | * falcon ID to bootstrap | ||
37 | */ | ||
38 | struct pmu_acr_cmd_bootstrap_falcon { | ||
39 | u8 cmd_type; | ||
40 | u32 flags; | ||
41 | u32 falconid; | ||
42 | }; | ||
43 | |||
44 | /* | ||
45 | * falcon ID to bootstrap | ||
46 | */ | ||
47 | struct pmu_acr_cmd_bootstrap_multiple_falcons { | ||
48 | u8 cmd_type; | ||
49 | u32 flags; | ||
50 | u32 falconidmask; | ||
51 | u32 usevamask; | ||
52 | struct falc_u64 wprvirtualbase; | ||
53 | }; | ||
54 | |||
55 | #define PMU_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_NO 1 | ||
56 | #define PMU_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_YES 0 | ||
57 | |||
58 | |||
59 | struct pmu_acr_cmd { | ||
60 | union { | ||
61 | u8 cmd_type; | ||
62 | struct pmu_acr_cmd_bootstrap_falcon bootstrap_falcon; | ||
63 | struct pmu_acr_cmd_init_wpr_details init_wpr; | ||
64 | struct pmu_acr_cmd_bootstrap_multiple_falcons boot_falcons; | ||
65 | }; | ||
66 | }; | ||
67 | |||
68 | /* acr messages */ | ||
69 | |||
70 | /* | ||
71 | * returns the WPR region init information | ||
72 | */ | ||
73 | #define PMU_ACR_MSG_ID_INIT_WPR_REGION 0 | ||
74 | |||
75 | /* | ||
76 | * Returns the Bootstrapped falcon ID to RM | ||
77 | */ | ||
78 | #define PMU_ACR_MSG_ID_BOOTSTRAP_FALCON 1 | ||
79 | |||
80 | /* | ||
81 | * Returns the WPR init status | ||
82 | */ | ||
83 | #define PMU_ACR_SUCCESS 0 | ||
84 | #define PMU_ACR_ERROR 1 | ||
85 | |||
86 | /* | ||
87 | * PMU notifies about bootstrap status of falcon | ||
88 | */ | ||
89 | struct pmu_acr_msg_bootstrap_falcon { | ||
90 | u8 msg_type; | ||
91 | union { | ||
92 | u32 errorcode; | ||
93 | u32 falconid; | ||
94 | }; | ||
95 | }; | ||
96 | |||
97 | struct pmu_acr_msg { | ||
98 | union { | ||
99 | u8 msg_type; | ||
100 | struct pmu_acr_msg_bootstrap_falcon acrmsg; | ||
101 | }; | ||
102 | }; | ||
103 | |||
104 | #endif /* _GPMUIFACR_H_ */ | ||
diff --git a/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h b/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h index f99d4e9e..751d6643 100644 --- a/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h +++ b/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h | |||
@@ -20,6 +20,7 @@ | |||
20 | #include "gpmuif_ap.h" | 20 | #include "gpmuif_ap.h" |
21 | #include "gpmuif_pg.h" | 21 | #include "gpmuif_pg.h" |
22 | #include "gpmuif_perfmon.h" | 22 | #include "gpmuif_perfmon.h" |
23 | #include "gpmuif_acr.h" | ||
23 | #include "gpmuifboardobj.h" | 24 | #include "gpmuifboardobj.h" |
24 | #include "gpmuifclk.h" | 25 | #include "gpmuifclk.h" |
25 | #include "gpmuifperf.h" | 26 | #include "gpmuifperf.h" |