diff options
author | Seema Khowala <seemaj@nvidia.com> | 2018-01-17 15:09:38 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-18 17:38:57 -0500 |
commit | 872be3a4ac16f4d139a9597b3fdae4355cb4baf2 (patch) | |
tree | 2afb6b3deb5d1883e01a8c8f623c9c175f6383d0 /drivers/gpu | |
parent | f8402eb90a68ab1e38ef87166458dc064501a8f9 (diff) |
gpu: nvgpu: ramin_big_page_size default val is set to 64kb
-MMU_CTRL_USE_PDB_BIG_PAGE_SIZE is set to TRUE and hence
RAMIN_BIG_PAGE_SIZE should be set to 64KB i.e. val 1.
By default this is set to 128KB i.e. val 0.
-This change will also fix an issue where perfbuffer_enable and
nvgpu_init_hwpm function pass 0 as big page size while initializing
inst_block and due to which ramin_big_page_size does not get updated
to 64KB and remains set to unsupported 128KB value.
-Volta supports 64KB for big pages. Selecting 128KB for
big pages results in an UNBOUND_INSTANCE fault.
Bug 200327596
Change-Id: Ie304e4e5ff7bedaead27e9380d64c59013dd64ca
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1639540
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ram_gp10b.h | 22 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h | 22 |
3 files changed, 44 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index 8cefbd3e..33591edc 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c | |||
@@ -431,8 +431,9 @@ void gp10b_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | |||
431 | ram_in_page_dir_base_target_sys_mem_ncoh_f(), | 431 | ram_in_page_dir_base_target_sys_mem_ncoh_f(), |
432 | ram_in_page_dir_base_target_vid_mem_f()) | | 432 | ram_in_page_dir_base_target_vid_mem_f()) | |
433 | ram_in_page_dir_base_vol_true_f() | | 433 | ram_in_page_dir_base_vol_true_f() | |
434 | ram_in_big_page_size_64kb_f() | | ||
434 | ram_in_page_dir_base_lo_f(pdb_addr_lo) | | 435 | ram_in_page_dir_base_lo_f(pdb_addr_lo) | |
435 | 1 << 10); | 436 | ram_in_use_ver2_pt_format_true_f()); |
436 | 437 | ||
437 | nvgpu_mem_wr32(g, inst_block, ram_in_page_dir_base_hi_w(), | 438 | nvgpu_mem_wr32(g, inst_block, ram_in_page_dir_base_hi_w(), |
438 | ram_in_page_dir_base_hi_f(pdb_addr_hi)); | 439 | ram_in_page_dir_base_hi_f(pdb_addr_hi)); |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ram_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ram_gp10b.h index a94fc0a2..cc83f520 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ram_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_ram_gp10b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -124,6 +124,26 @@ static inline u32 ram_in_page_dir_base_fault_replay_gcc_true_f(void) | |||
124 | { | 124 | { |
125 | return 0x20U; | 125 | return 0x20U; |
126 | } | 126 | } |
127 | static inline u32 ram_in_use_ver2_pt_format_f(u32 v) | ||
128 | { | ||
129 | return (v & 0x1U) << 10U; | ||
130 | } | ||
131 | static inline u32 ram_in_use_ver2_pt_format_m(void) | ||
132 | { | ||
133 | return 0x1U << 10U; | ||
134 | } | ||
135 | static inline u32 ram_in_use_ver2_pt_format_w(void) | ||
136 | { | ||
137 | return 128U; | ||
138 | } | ||
139 | static inline u32 ram_in_use_ver2_pt_format_true_f(void) | ||
140 | { | ||
141 | return 0x400U; | ||
142 | } | ||
143 | static inline u32 ram_in_use_ver2_pt_format_false_f(void) | ||
144 | { | ||
145 | return 0x0U; | ||
146 | } | ||
127 | static inline u32 ram_in_big_page_size_f(u32 v) | 147 | static inline u32 ram_in_big_page_size_f(u32 v) |
128 | { | 148 | { |
129 | return (v & 0x1U) << 11U; | 149 | return (v & 0x1U) << 11U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h index 1191e580..f6134f46 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -128,6 +128,26 @@ static inline u32 ram_in_page_dir_base_fault_replay_gcc_true_f(void) | |||
128 | { | 128 | { |
129 | return 0x20U; | 129 | return 0x20U; |
130 | } | 130 | } |
131 | static inline u32 ram_in_use_ver2_pt_format_f(u32 v) | ||
132 | { | ||
133 | return (v & 0x1U) << 10U; | ||
134 | } | ||
135 | static inline u32 ram_in_use_ver2_pt_format_m(void) | ||
136 | { | ||
137 | return 0x1U << 10U; | ||
138 | } | ||
139 | static inline u32 ram_in_use_ver2_pt_format_w(void) | ||
140 | { | ||
141 | return 128U; | ||
142 | } | ||
143 | static inline u32 ram_in_use_ver2_pt_format_true_f(void) | ||
144 | { | ||
145 | return 0x400U; | ||
146 | } | ||
147 | static inline u32 ram_in_use_ver2_pt_format_false_f(void) | ||
148 | { | ||
149 | return 0x0U; | ||
150 | } | ||
131 | static inline u32 ram_in_big_page_size_f(u32 v) | 151 | static inline u32 ram_in_big_page_size_f(u32 v) |
132 | { | 152 | { |
133 | return (v & 0x1U) << 11U; | 153 | return (v & 0x1U) << 11U; |