diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-07-05 15:21:18 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-06 15:04:43 -0400 |
commit | 84f712dee8b582dd7d2a19345c621a2ae3bd6292 (patch) | |
tree | de1b36f0b444e722630f16ddbed32f88aeef8c38 /drivers/gpu | |
parent | d8c0144f8b45ef8a94fc696efaa0c782c4c787af (diff) |
gpu: nvgpu: add handle_tpc_sm_ecc_exception gr ops
Needed to handle t19x sm ecc errors per tpc
JIRA GPUT19X-75
JIRA GPUT19X-109
Change-Id: I921615dd5f551f34cdf55c1b085b16f562f16eb0
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1514044
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 8 |
2 files changed, 11 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 95b93496..e30a89fe 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -304,6 +304,10 @@ struct gpu_ops { | |||
304 | u32 global_esr); | 304 | u32 global_esr); |
305 | void (*get_esr_sm_sel)(struct gk20a *g, u32 gpc, u32 tpc, | 305 | void (*get_esr_sm_sel)(struct gk20a *g, u32 gpc, u32 tpc, |
306 | u32 *esr_sm_sel); | 306 | u32 *esr_sm_sel); |
307 | int (*handle_tpc_sm_ecc_exception)(struct gk20a *g, | ||
308 | u32 gpc, u32 tpc, | ||
309 | bool *post_event, struct channel_gk20a *fault_ch, | ||
310 | u32 *hww_global_esr); | ||
307 | int (*handle_sm_exception)(struct gk20a *g, | 311 | int (*handle_sm_exception)(struct gk20a *g, |
308 | u32 gpc, u32 tpc, u32 sm, | 312 | u32 gpc, u32 tpc, u32 sm, |
309 | bool *post_event, struct channel_gk20a *fault_ch, | 313 | bool *post_event, struct channel_gk20a *fault_ch, |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 4bedcc9a..c5dab0b5 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -5646,6 +5646,11 @@ static int gk20a_gr_handle_tpc_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
5646 | 5646 | ||
5647 | gk20a_dbg(gpu_dbg_intr | gpu_dbg_gpu_dbg, | 5647 | gk20a_dbg(gpu_dbg_intr | gpu_dbg_gpu_dbg, |
5648 | "GPC%d TPC%d: SM exception pending", gpc, tpc); | 5648 | "GPC%d TPC%d: SM exception pending", gpc, tpc); |
5649 | |||
5650 | if (g->ops.gr.handle_tpc_sm_ecc_exception) | ||
5651 | g->ops.gr.handle_tpc_sm_ecc_exception(g, gpc, tpc, | ||
5652 | post_event, fault_ch, hww_global_esr); | ||
5653 | |||
5649 | g->ops.gr.get_esr_sm_sel(g, gpc, tpc, &esr_sm_sel); | 5654 | g->ops.gr.get_esr_sm_sel(g, gpc, tpc, &esr_sm_sel); |
5650 | 5655 | ||
5651 | for (sm = 0; sm < sm_per_tpc; sm++) { | 5656 | for (sm = 0; sm < sm_per_tpc; sm++) { |
@@ -5661,7 +5666,8 @@ static int gk20a_gr_handle_tpc_exception(struct gk20a *g, u32 gpc, u32 tpc, | |||
5661 | gpc, tpc, sm, post_event, fault_ch, | 5666 | gpc, tpc, sm, post_event, fault_ch, |
5662 | hww_global_esr); | 5667 | hww_global_esr); |
5663 | /* clear the hwws, also causes tpc and gpc | 5668 | /* clear the hwws, also causes tpc and gpc |
5664 | * exceptions to be cleared | 5669 | * exceptions to be cleared. Should be cleared |
5670 | * only if SM is locked down or empty. | ||
5665 | */ | 5671 | */ |
5666 | g->ops.gr.clear_sm_hww(g, | 5672 | g->ops.gr.clear_sm_hww(g, |
5667 | gpc, tpc, sm, *hww_global_esr); | 5673 | gpc, tpc, sm, *hww_global_esr); |