summaryrefslogtreecommitdiffstats
path: root/drivers/gpu
diff options
context:
space:
mode:
authorDeepak Nibade <dnibade@nvidia.com>2017-09-13 08:02:21 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-09-15 15:48:20 -0400
commit7d6d0405311337456f50d6fa032963c18d2c9f9f (patch)
treef49b3eaca16726ef471a37b92130c54f04625d03 /drivers/gpu
parentef6ea3475cac013c174905ab4f7f187700ae2a33 (diff)
gpu: nvgpu: support platform specific TSG enable/disable
Add platform specific operations to enable/disable a TSG and use them instead of directly calling enable/disable APIs For gm20b/gp106/gp10b we continue to use gk20a_enable_tsg() and gk20a_disable_tsg() as platform specific operations Bug 1739362 Change-Id: I2dd0f38c8303757e8c7a47d8da0e30a790e514f0 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1560635 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_tsg.c4
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c4
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c2
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c3
-rw-r--r--drivers/gpu/nvgpu/gp106/hal_gp106.c2
-rw-r--r--drivers/gpu/nvgpu/gp10b/hal_gp10b.c3
-rw-r--r--drivers/gpu/nvgpu/vgpu/fifo_vgpu.c2
8 files changed, 17 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c b/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
index d35ea14c..10379633 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_tsg.c
@@ -409,7 +409,7 @@ long nvgpu_ioctl_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
409 "failed to host gk20a for ioctl cmd: 0x%x", cmd); 409 "failed to host gk20a for ioctl cmd: 0x%x", cmd);
410 return err; 410 return err;
411 } 411 }
412 gk20a_enable_tsg(tsg); 412 g->ops.fifo.enable_tsg(tsg);
413 gk20a_idle(g); 413 gk20a_idle(g);
414 break; 414 break;
415 } 415 }
@@ -422,7 +422,7 @@ long nvgpu_ioctl_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
422 "failed to host gk20a for ioctl cmd: 0x%x", cmd); 422 "failed to host gk20a for ioctl cmd: 0x%x", cmd);
423 return err; 423 return err;
424 } 424 }
425 gk20a_disable_tsg(tsg); 425 g->ops.fifo.disable_tsg(tsg);
426 gk20a_idle(g); 426 gk20a_idle(g);
427 break; 427 break;
428 } 428 }
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 89862e63..d0d5c41f 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -200,7 +200,7 @@ int gk20a_enable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch)
200 200
201 if (gk20a_is_channel_marked_as_tsg(ch)) { 201 if (gk20a_is_channel_marked_as_tsg(ch)) {
202 tsg = &g->fifo.tsg[ch->tsgid]; 202 tsg = &g->fifo.tsg[ch->tsgid];
203 gk20a_enable_tsg(tsg); 203 g->ops.fifo.enable_tsg(tsg);
204 } else { 204 } else {
205 g->ops.fifo.enable_channel(ch); 205 g->ops.fifo.enable_channel(ch);
206 } 206 }
@@ -214,7 +214,7 @@ int gk20a_disable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch)
214 214
215 if (gk20a_is_channel_marked_as_tsg(ch)) { 215 if (gk20a_is_channel_marked_as_tsg(ch)) {
216 tsg = &g->fifo.tsg[ch->tsgid]; 216 tsg = &g->fifo.tsg[ch->tsgid];
217 gk20a_disable_tsg(tsg); 217 g->ops.fifo.disable_tsg(tsg);
218 } else { 218 } else {
219 g->ops.fifo.disable_channel(ch); 219 g->ops.fifo.disable_channel(ch);
220 } 220 }
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 7062a8a0..88ce6a83 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1383,7 +1383,7 @@ void gk20a_fifo_abort_tsg(struct gk20a *g, u32 tsgid, bool preempt)
1383 1383
1384 gk20a_dbg_fn(""); 1384 gk20a_dbg_fn("");
1385 1385
1386 gk20a_disable_tsg(tsg); 1386 g->ops.fifo.disable_tsg(tsg);
1387 1387
1388 if (preempt) 1388 if (preempt)
1389 g->ops.fifo.preempt_tsg(g, tsgid); 1389 g->ops.fifo.preempt_tsg(g, tsgid);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index d2a752d7..4564b6e9 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -475,6 +475,8 @@ struct gpu_ops {
475 int (*resetup_ramfc)(struct channel_gk20a *c); 475 int (*resetup_ramfc)(struct channel_gk20a *c);
476 int (*preempt_channel)(struct gk20a *g, u32 chid); 476 int (*preempt_channel)(struct gk20a *g, u32 chid);
477 int (*preempt_tsg)(struct gk20a *g, u32 tsgid); 477 int (*preempt_tsg)(struct gk20a *g, u32 tsgid);
478 int (*enable_tsg)(struct tsg_gk20a *tsg);
479 int (*disable_tsg)(struct tsg_gk20a *tsg);
478 int (*reschedule_runlist)(struct gk20a *g, u32 runlist_id); 480 int (*reschedule_runlist)(struct gk20a *g, u32 runlist_id);
479 int (*update_runlist)(struct gk20a *g, u32 runlist_id, 481 int (*update_runlist)(struct gk20a *g, u32 runlist_id,
480 u32 chid, bool add, 482 u32 chid, bool add,
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index b77f10d2..46c1e81f 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -28,6 +28,7 @@
28#include "gk20a/regops_gk20a.h" 28#include "gk20a/regops_gk20a.h"
29#include "gk20a/pmu_gk20a.h" 29#include "gk20a/pmu_gk20a.h"
30#include "gk20a/gr_gk20a.h" 30#include "gk20a/gr_gk20a.h"
31#include "gk20a/tsg_gk20a.h"
31 32
32#include "ltc_gm20b.h" 33#include "ltc_gm20b.h"
33#include "gr_gm20b.h" 34#include "gr_gm20b.h"
@@ -365,6 +366,8 @@ static const struct gpu_ops gm20b_ops = {
365 .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val, 366 .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val,
366 .preempt_channel = gk20a_fifo_preempt_channel, 367 .preempt_channel = gk20a_fifo_preempt_channel,
367 .preempt_tsg = gk20a_fifo_preempt_tsg, 368 .preempt_tsg = gk20a_fifo_preempt_tsg,
369 .enable_tsg = gk20a_enable_tsg,
370 .disable_tsg = gk20a_disable_tsg,
368 .update_runlist = gk20a_fifo_update_runlist, 371 .update_runlist = gk20a_fifo_update_runlist,
369 .trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault, 372 .trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault,
370 .get_mmu_fault_info = gk20a_fifo_get_mmu_fault_info, 373 .get_mmu_fault_info = gk20a_fifo_get_mmu_fault_info,
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index b33e80ec..e3fa596a 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -426,6 +426,8 @@ static const struct gpu_ops gp106_ops = {
426 .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val, 426 .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val,
427 .preempt_channel = gk20a_fifo_preempt_channel, 427 .preempt_channel = gk20a_fifo_preempt_channel,
428 .preempt_tsg = gk20a_fifo_preempt_tsg, 428 .preempt_tsg = gk20a_fifo_preempt_tsg,
429 .enable_tsg = gk20a_enable_tsg,
430 .disable_tsg = gk20a_disable_tsg,
429 .update_runlist = gk20a_fifo_update_runlist, 431 .update_runlist = gk20a_fifo_update_runlist,
430 .trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault, 432 .trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault,
431 .get_mmu_fault_info = gp10b_fifo_get_mmu_fault_info, 433 .get_mmu_fault_info = gp10b_fifo_get_mmu_fault_info,
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 3efee9e2..ffb6fe24 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -28,6 +28,7 @@
28#include "gk20a/fb_gk20a.h" 28#include "gk20a/fb_gk20a.h"
29#include "gk20a/pmu_gk20a.h" 29#include "gk20a/pmu_gk20a.h"
30#include "gk20a/gr_gk20a.h" 30#include "gk20a/gr_gk20a.h"
31#include "gk20a/tsg_gk20a.h"
31 32
32#include "gp10b/gr_gp10b.h" 33#include "gp10b/gr_gp10b.h"
33#include "gp10b/fecs_trace_gp10b.h" 34#include "gp10b/fecs_trace_gp10b.h"
@@ -386,6 +387,8 @@ static const struct gpu_ops gp10b_ops = {
386 .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val, 387 .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val,
387 .preempt_channel = gk20a_fifo_preempt_channel, 388 .preempt_channel = gk20a_fifo_preempt_channel,
388 .preempt_tsg = gk20a_fifo_preempt_tsg, 389 .preempt_tsg = gk20a_fifo_preempt_tsg,
390 .enable_tsg = gk20a_enable_tsg,
391 .disable_tsg = gk20a_disable_tsg,
389 .reschedule_runlist = gk20a_fifo_reschedule_runlist, 392 .reschedule_runlist = gk20a_fifo_reschedule_runlist,
390 .update_runlist = gk20a_fifo_update_runlist, 393 .update_runlist = gk20a_fifo_update_runlist,
391 .trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault, 394 .trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault,
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
index 252b4e43..26e4de02 100644
--- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
@@ -821,6 +821,8 @@ void vgpu_init_fifo_ops(struct gpu_ops *gops)
821 gops->fifo.setup_ramfc = vgpu_channel_setup_ramfc; 821 gops->fifo.setup_ramfc = vgpu_channel_setup_ramfc;
822 gops->fifo.preempt_channel = vgpu_fifo_preempt_channel; 822 gops->fifo.preempt_channel = vgpu_fifo_preempt_channel;
823 gops->fifo.preempt_tsg = vgpu_fifo_preempt_tsg; 823 gops->fifo.preempt_tsg = vgpu_fifo_preempt_tsg;
824 gops->fifo.enable_tsg = gk20a_enable_tsg;
825 gops->fifo.disable_tsg = gk20a_disable_tsg;
824 gops->fifo.update_runlist = vgpu_fifo_update_runlist; 826 gops->fifo.update_runlist = vgpu_fifo_update_runlist;
825 gops->fifo.wait_engine_idle = vgpu_fifo_wait_engine_idle; 827 gops->fifo.wait_engine_idle = vgpu_fifo_wait_engine_idle;
826 gops->fifo.channel_set_priority = vgpu_channel_set_priority; 828 gops->fifo.channel_set_priority = vgpu_channel_set_priority;