diff options
author | David Nieto <dmartineznie@nvidia.com> | 2017-08-08 15:50:55 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-10 15:05:42 -0400 |
commit | 7c5cf70268ca038f85686fbdec29729d1a9024c1 (patch) | |
tree | bc30b8e724addb367b50fbd1cd4eaa994fa30bb4 /drivers/gpu | |
parent | bf8dca77aee16b98a89e8ef5491907f2a791f1ff (diff) |
gpu: nvgpu: add support for pre-os FW
Pre-os firmware takes care, among others, of the control of FAN till
the driver takes over its control. On some GPUs not enabling this FW can lead
tp physical board damage, hence it is needed to run this firmware.
JIRA: NVGPUGV100-9
Change-Id: I18d54cfd5eb64ecec79c5dae67ac8d5bb1facf36
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1549035
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/pci.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/bios_gp106.c | 19 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/bios_gp106.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 7 |
6 files changed, 29 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c index 6e3e02e5..92764c21 100644 --- a/drivers/gpu/nvgpu/common/linux/pci.c +++ b/drivers/gpu/nvgpu/common/linux/pci.c | |||
@@ -239,6 +239,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
239 | .honors_aperture = true, | 239 | .honors_aperture = true, |
240 | .vbios_min_version = 0x88001e00, | 240 | .vbios_min_version = 0x88001e00, |
241 | .hardcode_sw_threshold = false, | 241 | .hardcode_sw_threshold = false, |
242 | .run_preos = true, | ||
242 | }, | 243 | }, |
243 | { /* DEVICE=PG503 SKU 200 ES */ | 244 | { /* DEVICE=PG503 SKU 200 ES */ |
244 | /* ptimer src frequency in hz */ | 245 | /* ptimer src frequency in hz */ |
@@ -272,6 +273,7 @@ static struct gk20a_platform nvgpu_pci_device[] = { | |||
272 | .honors_aperture = true, | 273 | .honors_aperture = true, |
273 | .vbios_min_version = 0x88001e00, | 274 | .vbios_min_version = 0x88001e00, |
274 | .hardcode_sw_threshold = false, | 275 | .hardcode_sw_threshold = false, |
276 | .run_preos = true, | ||
275 | } | 277 | } |
276 | }; | 278 | }; |
277 | 279 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 17ba3ee4..d1ad5992 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -187,8 +187,8 @@ int gk20a_finalize_poweron(struct gk20a *g) | |||
187 | nvgpu_flcn_sw_init(g, FALCON_ID_PMU); | 187 | nvgpu_flcn_sw_init(g, FALCON_ID_PMU); |
188 | nvgpu_flcn_sw_init(g, FALCON_ID_SEC2); | 188 | nvgpu_flcn_sw_init(g, FALCON_ID_SEC2); |
189 | 189 | ||
190 | if (g->ops.bios_init) | 190 | if (g->ops.bios.init) |
191 | err = g->ops.bios_init(g); | 191 | err = g->ops.bios.init(g); |
192 | if (err) | 192 | if (err) |
193 | goto done; | 193 | goto done; |
194 | 194 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 97b40474..537d03d8 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -969,7 +969,11 @@ struct gpu_ops { | |||
969 | int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); | 969 | int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); |
970 | } bus; | 970 | } bus; |
971 | 971 | ||
972 | int (*bios_init)(struct gk20a *g); | 972 | struct { |
973 | int (*init)(struct gk20a *g); | ||
974 | int (*preos_wait_for_halt)(struct gk20a *g); | ||
975 | void (*preos_reload_check)(struct gk20a *g); | ||
976 | } bios; | ||
973 | 977 | ||
974 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 978 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
975 | struct { | 979 | struct { |
diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.c b/drivers/gpu/nvgpu/gp106/bios_gp106.c index b7e031c6..3178ae53 100644 --- a/drivers/gpu/nvgpu/gp106/bios_gp106.c +++ b/drivers/gpu/nvgpu/gp106/bios_gp106.c | |||
@@ -135,6 +135,16 @@ out: | |||
135 | return err; | 135 | return err; |
136 | } | 136 | } |
137 | 137 | ||
138 | int gp106_bios_preos_wait_for_halt(struct gk20a *g) | ||
139 | { | ||
140 | int err = 0; | ||
141 | |||
142 | if (nvgpu_flcn_wait_for_halt(g->pmu.flcn, PMU_BOOT_TIMEOUT_MAX / 1000)) | ||
143 | err = -ETIMEDOUT; | ||
144 | |||
145 | return err; | ||
146 | } | ||
147 | |||
138 | static int gp106_bios_preos(struct gk20a *g) | 148 | static int gp106_bios_preos(struct gk20a *g) |
139 | { | 149 | { |
140 | int err = 0; | 150 | int err = 0; |
@@ -146,6 +156,9 @@ static int gp106_bios_preos(struct gk20a *g) | |||
146 | goto out; | 156 | goto out; |
147 | } | 157 | } |
148 | 158 | ||
159 | if (g->ops.bios.preos_reload_check) | ||
160 | g->ops.bios.preos_reload_check(g); | ||
161 | |||
149 | upload_code(g, g->bios.preos.bootloader_phys_base, | 162 | upload_code(g, g->bios.preos.bootloader_phys_base, |
150 | g->bios.preos.bootloader, | 163 | g->bios.preos.bootloader, |
151 | g->bios.preos.bootloader_size, | 164 | g->bios.preos.bootloader_size, |
@@ -161,11 +174,7 @@ static int gp106_bios_preos(struct gk20a *g) | |||
161 | 174 | ||
162 | nvgpu_flcn_bootstrap(g->pmu.flcn, g->bios.preos.code_entry_point); | 175 | nvgpu_flcn_bootstrap(g->pmu.flcn, g->bios.preos.code_entry_point); |
163 | 176 | ||
164 | if (nvgpu_flcn_wait_for_halt(g->pmu.flcn, | 177 | err = g->ops.bios.preos_wait_for_halt(g); |
165 | PMU_BOOT_TIMEOUT_MAX / 1000)) { | ||
166 | err = -ETIMEDOUT; | ||
167 | goto out; | ||
168 | } | ||
169 | 178 | ||
170 | nvgpu_flcn_clear_halt_intr_status(g->pmu.flcn, | 179 | nvgpu_flcn_clear_halt_intr_status(g->pmu.flcn, |
171 | gk20a_get_gr_idle_timeout(g)); | 180 | gk20a_get_gr_idle_timeout(g)); |
diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.h b/drivers/gpu/nvgpu/gp106/bios_gp106.h index 0301177e..a5229fff 100644 --- a/drivers/gpu/nvgpu/gp106/bios_gp106.h +++ b/drivers/gpu/nvgpu/gp106/bios_gp106.h | |||
@@ -27,6 +27,5 @@ struct gk20a; | |||
27 | struct gpu_ops; | 27 | struct gpu_ops; |
28 | 28 | ||
29 | int gp106_bios_init(struct gk20a *g); | 29 | int gp106_bios_init(struct gk20a *g); |
30 | void gp106_init_bios_ops(struct gpu_ops *gops); | 30 | int gp106_bios_preos_wait_for_halt(struct gk20a *g); |
31 | |||
32 | #endif | 31 | #endif |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 1c423785..8523e7d1 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -216,6 +216,10 @@ static int gp106_init_gpu_characteristics(struct gk20a *g) | |||
216 | } | 216 | } |
217 | 217 | ||
218 | static const struct gpu_ops gp106_ops = { | 218 | static const struct gpu_ops gp106_ops = { |
219 | .bios = { | ||
220 | .init = gp106_bios_init, | ||
221 | .preos_wait_for_halt = gp106_bios_preos_wait_for_halt, | ||
222 | }, | ||
219 | .ltc = { | 223 | .ltc = { |
220 | .determine_L2_size_bytes = gp10b_determine_L2_size_bytes, | 224 | .determine_L2_size_bytes = gp10b_determine_L2_size_bytes, |
221 | .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, | 225 | .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, |
@@ -695,7 +699,6 @@ static const struct gpu_ops gp106_ops = { | |||
695 | }, | 699 | }, |
696 | .get_litter_value = gp106_get_litter_value, | 700 | .get_litter_value = gp106_get_litter_value, |
697 | .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, | 701 | .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, |
698 | .bios_init = gp106_bios_init, | ||
699 | }; | 702 | }; |
700 | 703 | ||
701 | int gp106_init_hal(struct gk20a *g) | 704 | int gp106_init_hal(struct gk20a *g) |
@@ -705,6 +708,7 @@ int gp106_init_hal(struct gk20a *g) | |||
705 | 708 | ||
706 | gk20a_dbg_fn(""); | 709 | gk20a_dbg_fn(""); |
707 | 710 | ||
711 | gops->bios = gp106_ops.bios; | ||
708 | gops->ltc = gp106_ops.ltc; | 712 | gops->ltc = gp106_ops.ltc; |
709 | gops->ce2 = gp106_ops.ce2; | 713 | gops->ce2 = gp106_ops.ce2; |
710 | gops->gr = gp106_ops.gr; | 714 | gops->gr = gp106_ops.gr; |
@@ -747,7 +751,6 @@ int gp106_init_hal(struct gk20a *g) | |||
747 | gops->get_litter_value = gp106_ops.get_litter_value; | 751 | gops->get_litter_value = gp106_ops.get_litter_value; |
748 | gops->chip_init_gpu_characteristics = | 752 | gops->chip_init_gpu_characteristics = |
749 | gp106_ops.chip_init_gpu_characteristics; | 753 | gp106_ops.chip_init_gpu_characteristics; |
750 | gops->bios_init = gp106_ops.bios_init; | ||
751 | 754 | ||
752 | __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); | 755 | __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); |
753 | __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true); | 756 | __nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, true); |