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authorDeepak Nibade <dnibade@nvidia.com>2016-04-27 09:32:43 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-05-09 16:16:53 -0400
commit771f742703bb56598bc341ec4eaee5ff7c036d4d (patch)
treea74d32db43c4fe87ee6d55a587a8f6de12490bbf /drivers/gpu
parentd868b654419cfa096f563c9281a2a5cc067c23db (diff)
gpu: nvgpu: add supported preemptions to gpu characteristics
Add below flag fields to gpu characteristics to indicate supported and default preemption modes on platform for graphics and compute __u32 graphics_preemption_mode_flags; __u32 compute_preemption_mode_flags; __u32 default_graphics_preempt_mode; __u32 default_compute_preempt_mode; Add struct nvgpu_preemption_modes_rec to struct gr_gk20a to store these values locally Use platform specific get_preemption_mode_flags() to get the flags and define gk20a/gm20b specific get_preemption_mode_flags() API Bug 1646259 Change-Id: I80193c0d988dc93bd96585f9aa631fd817f4dfa3 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1133595 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c11
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c17
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h9
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c18
5 files changed, 57 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 4283e1ad..c07e7e4b 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -2142,6 +2142,17 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
2142 if (platform->clk_round_rate) 2142 if (platform->clk_round_rate)
2143 gpu->max_freq = platform->clk_round_rate(g->dev, UINT_MAX); 2143 gpu->max_freq = platform->clk_round_rate(g->dev, UINT_MAX);
2144 2144
2145 g->ops.gr.get_preemption_mode_flags(g, &g->gr.preemption_mode_rec);
2146 gpu->graphics_preemption_mode_flags =
2147 g->gr.preemption_mode_rec.graphics_preemption_mode_flags;
2148 gpu->compute_preemption_mode_flags =
2149 g->gr.preemption_mode_rec.compute_preemption_mode_flags;
2150 gpu->default_graphics_preempt_mode =
2151 g->gr.preemption_mode_rec.default_graphics_preempt_mode;
2152 gpu->default_compute_preempt_mode =
2153 g->gr.preemption_mode_rec.default_compute_preempt_mode;
2154
2155
2145 return 0; 2156 return 0;
2146} 2157}
2147 2158
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 64e410db..09198fa5 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -257,6 +257,8 @@ struct gpu_ops {
257 int (*set_preemption_mode)(struct channel_gk20a *ch, 257 int (*set_preemption_mode)(struct channel_gk20a *ch,
258 u32 graphics_preempt_mode, 258 u32 graphics_preempt_mode,
259 u32 compute_preempt_mode); 259 u32 compute_preempt_mode);
260 int (*get_preemption_mode_flags)(struct gk20a *g,
261 struct nvgpu_preemption_modes_rec *preemption_modes_rec);
260 } gr; 262 } gr;
261 const char *name; 263 const char *name;
262 struct { 264 struct {
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index aa63e559..8b645cc2 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -8659,6 +8659,22 @@ clean_up:
8659 return err; 8659 return err;
8660} 8660}
8661 8661
8662static int gr_gk20a_get_preemption_mode_flags(struct gk20a *g,
8663 struct nvgpu_preemption_modes_rec *preemption_modes_rec)
8664{
8665 preemption_modes_rec->graphics_preemption_mode_flags =
8666 NVGPU_GRAPHICS_PREEMPTION_MODE_WFI;
8667 preemption_modes_rec->compute_preemption_mode_flags =
8668 NVGPU_COMPUTE_PREEMPTION_MODE_WFI;
8669
8670 preemption_modes_rec->default_graphics_preempt_mode =
8671 NVGPU_GRAPHICS_PREEMPTION_MODE_WFI;
8672 preemption_modes_rec->default_compute_preempt_mode =
8673 NVGPU_COMPUTE_PREEMPTION_MODE_WFI;
8674
8675 return 0;
8676}
8677
8662void gk20a_init_gr_ops(struct gpu_ops *gops) 8678void gk20a_init_gr_ops(struct gpu_ops *gops)
8663{ 8679{
8664 gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg; 8680 gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg;
@@ -8726,4 +8742,5 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
8726 gops->gr.update_sm_error_state = gk20a_gr_update_sm_error_state; 8742 gops->gr.update_sm_error_state = gk20a_gr_update_sm_error_state;
8727 gops->gr.clear_sm_error_state = gk20a_gr_clear_sm_error_state; 8743 gops->gr.clear_sm_error_state = gk20a_gr_clear_sm_error_state;
8728 gops->gr.suspend_contexts = gr_gk20a_suspend_contexts; 8744 gops->gr.suspend_contexts = gr_gk20a_suspend_contexts;
8745 gops->gr.get_preemption_mode_flags = gr_gk20a_get_preemption_mode_flags;
8729} 8746}
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 10997c17..15d1ea7d 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -188,6 +188,14 @@ struct gr_gk20a_isr_data {
188 u32 class_num; 188 u32 class_num;
189}; 189};
190 190
191struct nvgpu_preemption_modes_rec {
192 u32 graphics_preemption_mode_flags; /* supported preemption modes */
193 u32 compute_preemption_mode_flags; /* supported preemption modes */
194
195 u32 default_graphics_preempt_mode; /* default mode */
196 u32 default_compute_preempt_mode; /* default mode */
197};
198
191struct gr_gk20a { 199struct gr_gk20a {
192 struct gk20a *g; 200 struct gk20a *g;
193 struct { 201 struct {
@@ -325,6 +333,7 @@ struct gr_gk20a {
325 bool sw_ready; 333 bool sw_ready;
326 bool skip_ucode_init; 334 bool skip_ucode_init;
327 335
336 struct nvgpu_preemption_modes_rec preemption_mode_rec;
328#ifdef CONFIG_ARCH_TEGRA_18x_SOC 337#ifdef CONFIG_ARCH_TEGRA_18x_SOC
329 struct gr_t18x t18x; 338 struct gr_t18x t18x;
330#endif 339#endif
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index dbe30f00..2a982f87 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1345,6 +1345,23 @@ fail:
1345 return err; 1345 return err;
1346} 1346}
1347 1347
1348static int gr_gm20b_get_preemption_mode_flags(struct gk20a *g,
1349 struct nvgpu_preemption_modes_rec *preemption_modes_rec)
1350{
1351 preemption_modes_rec->graphics_preemption_mode_flags =
1352 NVGPU_GRAPHICS_PREEMPTION_MODE_WFI;
1353 preemption_modes_rec->compute_preemption_mode_flags = (
1354 NVGPU_COMPUTE_PREEMPTION_MODE_WFI |
1355 NVGPU_COMPUTE_PREEMPTION_MODE_CTA);
1356
1357 preemption_modes_rec->default_graphics_preempt_mode =
1358 NVGPU_GRAPHICS_PREEMPTION_MODE_WFI;
1359 preemption_modes_rec->default_compute_preempt_mode =
1360 NVGPU_COMPUTE_PREEMPTION_MODE_CTA;
1361
1362 return 0;
1363}
1364
1348void gm20b_init_gr(struct gpu_ops *gops) 1365void gm20b_init_gr(struct gpu_ops *gops)
1349{ 1366{
1350 gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu; 1367 gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu;
@@ -1417,4 +1434,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
1417 gops->gr.update_sm_error_state = gm20b_gr_update_sm_error_state; 1434 gops->gr.update_sm_error_state = gm20b_gr_update_sm_error_state;
1418 gops->gr.clear_sm_error_state = gm20b_gr_clear_sm_error_state; 1435 gops->gr.clear_sm_error_state = gm20b_gr_clear_sm_error_state;
1419 gops->gr.suspend_contexts = gr_gk20a_suspend_contexts; 1436 gops->gr.suspend_contexts = gr_gk20a_suspend_contexts;
1437 gops->gr.get_preemption_mode_flags = gr_gm20b_get_preemption_mode_flags;
1420} 1438}