diff options
author | Seema Khowala <seemaj@nvidia.com> | 2016-12-28 14:11:12 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-01-02 16:57:16 -0500 |
commit | 609260d3d6c50045703ef3fea49ef414e6d58e82 (patch) | |
tree | 94ed7ed937b5842a8c02f12c0bd29b255f798c9f /drivers/gpu | |
parent | 35969806d2c763d4a5662ba6a9233a63aa00352d (diff) |
gpu: nvgpu: gv11b: hw header update for CL37750038
Change-Id: I7ca3d9968dc37b6514a08d3f49b6d2353e11671d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1277786
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h | 124 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h | 6 |
2 files changed, 3 insertions, 127 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h index 8ea2e06a..d3e82e55 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h | |||
@@ -502,128 +502,4 @@ static inline u32 fifo_pbdma_status_chsw_in_progress_v(void) | |||
502 | { | 502 | { |
503 | return 0x00000001; | 503 | return 0x00000001; |
504 | } | 504 | } |
505 | static inline u32 fifo_replay_fault_buffer_lo_r(void) | ||
506 | { | ||
507 | return 0x00002a70; | ||
508 | } | ||
509 | static inline u32 fifo_replay_fault_buffer_lo_enable_v(u32 r) | ||
510 | { | ||
511 | return (r >> 0) & 0x1; | ||
512 | } | ||
513 | static inline u32 fifo_replay_fault_buffer_lo_enable_true_v(void) | ||
514 | { | ||
515 | return 0x00000001; | ||
516 | } | ||
517 | static inline u32 fifo_replay_fault_buffer_lo_enable_false_v(void) | ||
518 | { | ||
519 | return 0x00000000; | ||
520 | } | ||
521 | static inline u32 fifo_replay_fault_buffer_lo_base_f(u32 v) | ||
522 | { | ||
523 | return (v & 0xfffff) << 12; | ||
524 | } | ||
525 | static inline u32 fifo_replay_fault_buffer_lo_base_reset_v(void) | ||
526 | { | ||
527 | return 0x00000000; | ||
528 | } | ||
529 | static inline u32 fifo_replay_fault_buffer_hi_r(void) | ||
530 | { | ||
531 | return 0x00002a74; | ||
532 | } | ||
533 | static inline u32 fifo_replay_fault_buffer_hi_base_f(u32 v) | ||
534 | { | ||
535 | return (v & 0xff) << 0; | ||
536 | } | ||
537 | static inline u32 fifo_replay_fault_buffer_hi_base_reset_v(void) | ||
538 | { | ||
539 | return 0x00000000; | ||
540 | } | ||
541 | static inline u32 fifo_replay_fault_buffer_size_r(void) | ||
542 | { | ||
543 | return 0x00002a78; | ||
544 | } | ||
545 | static inline u32 fifo_replay_fault_buffer_size_hw_f(u32 v) | ||
546 | { | ||
547 | return (v & 0x3ff) << 0; | ||
548 | } | ||
549 | static inline u32 fifo_replay_fault_buffer_size_hw_entries_v(void) | ||
550 | { | ||
551 | return 0x00000140; | ||
552 | } | ||
553 | static inline u32 fifo_replay_fault_buffer_get_r(void) | ||
554 | { | ||
555 | return 0x00002a7c; | ||
556 | } | ||
557 | static inline u32 fifo_replay_fault_buffer_get_offset_hw_f(u32 v) | ||
558 | { | ||
559 | return (v & 0x3ff) << 0; | ||
560 | } | ||
561 | static inline u32 fifo_replay_fault_buffer_get_offset_hw_init_v(void) | ||
562 | { | ||
563 | return 0x00000000; | ||
564 | } | ||
565 | static inline u32 fifo_replay_fault_buffer_put_r(void) | ||
566 | { | ||
567 | return 0x00002a80; | ||
568 | } | ||
569 | static inline u32 fifo_replay_fault_buffer_put_offset_hw_f(u32 v) | ||
570 | { | ||
571 | return (v & 0x3ff) << 0; | ||
572 | } | ||
573 | static inline u32 fifo_replay_fault_buffer_put_offset_hw_init_v(void) | ||
574 | { | ||
575 | return 0x00000000; | ||
576 | } | ||
577 | static inline u32 fifo_replay_fault_buffer_info_r(void) | ||
578 | { | ||
579 | return 0x00002a84; | ||
580 | } | ||
581 | static inline u32 fifo_replay_fault_buffer_info_overflow_f(u32 v) | ||
582 | { | ||
583 | return (v & 0x1) << 0; | ||
584 | } | ||
585 | static inline u32 fifo_replay_fault_buffer_info_overflow_false_v(void) | ||
586 | { | ||
587 | return 0x00000000; | ||
588 | } | ||
589 | static inline u32 fifo_replay_fault_buffer_info_overflow_true_v(void) | ||
590 | { | ||
591 | return 0x00000001; | ||
592 | } | ||
593 | static inline u32 fifo_replay_fault_buffer_info_overflow_clear_v(void) | ||
594 | { | ||
595 | return 0x00000001; | ||
596 | } | ||
597 | static inline u32 fifo_replay_fault_buffer_info_write_nack_f(u32 v) | ||
598 | { | ||
599 | return (v & 0x1) << 24; | ||
600 | } | ||
601 | static inline u32 fifo_replay_fault_buffer_info_write_nack_false_v(void) | ||
602 | { | ||
603 | return 0x00000000; | ||
604 | } | ||
605 | static inline u32 fifo_replay_fault_buffer_info_write_nack_true_v(void) | ||
606 | { | ||
607 | return 0x00000001; | ||
608 | } | ||
609 | static inline u32 fifo_replay_fault_buffer_info_write_nack_clear_v(void) | ||
610 | { | ||
611 | return 0x00000001; | ||
612 | } | ||
613 | static inline u32 fifo_replay_fault_buffer_info_fault_while_buffer_disabled_f(u32 v) | ||
614 | { | ||
615 | return (v & 0x1) << 28; | ||
616 | } | ||
617 | static inline u32 fifo_replay_fault_buffer_info_fault_while_buffer_disabled_false_v(void) | ||
618 | { | ||
619 | return 0x00000000; | ||
620 | } | ||
621 | static inline u32 fifo_replay_fault_buffer_info_fault_while_buffer_disabled_true_v(void) | ||
622 | { | ||
623 | return 0x00000001; | ||
624 | } | ||
625 | static inline u32 fifo_replay_fault_buffer_info_fault_while_buffer_disabled_clear_v(void) | ||
626 | { | ||
627 | return 0x00000001; | ||
628 | } | ||
629 | #endif | 505 | #endif |
diff --git a/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h index 02bb120b..99da5f73 100644 --- a/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h | |||
@@ -2240,11 +2240,11 @@ static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_m(void) | |||
2240 | } | 2240 | } |
2241 | static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v(void) | 2241 | static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v(void) |
2242 | { | 2242 | { |
2243 | return 0x00000400; | 2243 | return 0x00000800; |
2244 | } | 2244 | } |
2245 | static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v(void) | 2245 | static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_gfxp_v(void) |
2246 | { | 2246 | { |
2247 | return 0x00000d00; | 2247 | return 0x00001100; |
2248 | } | 2248 | } |
2249 | static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_granularity_v(void) | 2249 | static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_granularity_v(void) |
2250 | { | 2250 | { |
@@ -2288,7 +2288,7 @@ static inline u32 gr_gpc0_ppc0_cbm_beta_steady_state_cb_size_v_f(u32 v) | |||
2288 | } | 2288 | } |
2289 | static inline u32 gr_gpc0_ppc0_cbm_beta_steady_state_cb_size_v_default_v(void) | 2289 | static inline u32 gr_gpc0_ppc0_cbm_beta_steady_state_cb_size_v_default_v(void) |
2290 | { | 2290 | { |
2291 | return 0x00000400; | 2291 | return 0x00000800; |
2292 | } | 2292 | } |
2293 | static inline u32 gr_gpcs_tpcs_tex_rm_cb_0_r(void) | 2293 | static inline u32 gr_gpcs_tpcs_tex_rm_cb_0_r(void) |
2294 | { | 2294 | { |