gpu: nvgpu: Use gm20b version of BAR1 bind

All chips should use the waiting version of BAR1 bind since gm20b.
Change gp10b and gp106 to do that. BAR1 is not used in Volta.

JIRa NVGPU-588

Change-Id: Ib6957ebea4effa7c64f4d71522447fa6245728ed
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1730895
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

5 files changed, 6 insertions, 22 deletions

diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c
index 532fc9c6..d4ef41c1 100644
--- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c
+++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c
@@ -59,24 +59,6 @@ void gk20a_bus_isr(struct gk20a *g)
         gk20a_writel(g, bus_intr_0_r(), val);
 }
 
-int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
-{
-        u64 iova = nvgpu_inst_block_addr(g, bar1_inst);
-        u32 ptr_v = (u32)(iova >> bus_bar1_block_ptr_shift_v());
-
-        nvgpu_log(g, gpu_dbg_info, "bar1 inst block ptr: 0x%08x", ptr_v);
-
-        gk20a_writel(g, bus_bar1_block_r(),
-                     nvgpu_aperture_mask(g, bar1_inst,
-                                         bus_bar1_block_target_sys_mem_ncoh_f(),
-                                         bus_bar1_block_target_sys_mem_coh_f(),
-                                         bus_bar1_block_target_vid_mem_f()) |
-                     bus_bar1_block_mode_virtual_f() |
-                     bus_bar1_block_ptr_f(ptr_v));
-
-        return 0;
-}
-
 u32 gk20a_bus_set_bar0_window(struct gk20a *g, struct nvgpu_mem *mem,
                        struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl, u32 w)
 {
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.h b/drivers/gpu/nvgpu/common/bus/bus_gk20a.h
index 541472cd..4c7e62d9 100644
--- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.h
+++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.h
@@ -31,7 +31,6 @@ struct nvgpu_sgl;
 
 void gk20a_bus_isr(struct gk20a *g);
 void gk20a_bus_init_hw(struct gk20a *g);
-int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst);
 u32 gk20a_bus_set_bar0_window(struct gk20a *g, struct nvgpu_mem *mem,
                        struct nvgpu_sgt *sgt,
                        struct nvgpu_sgl *sgl,
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 33e69d4e..eec0f917 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -25,6 +25,7 @@
 #include "common/bus/bus_gk20a.h"
 #include "common/clock_gating/gp106_gating_reglist.h"
 #include "common/ptimer/ptimer_gk20a.h"
+#include "common/bus/bus_gm20b.h"
 
 #include "gk20a/gk20a.h"
 #include "gk20a/fifo_gk20a.h"
@@ -721,7 +722,7 @@ static const struct gpu_ops gp106_ops = {
         .bus = {
                 .init_hw = gk20a_bus_init_hw,
                 .isr = gk20a_bus_isr,
-                .bar1_bind = gk20a_bus_bar1_bind,
+                .bar1_bind = gm20b_bus_bar1_bind,
                 .set_bar0_window = gk20a_bus_set_bar0_window,
         },
         .ptimer = {
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 0106f6c9..934ddb9a 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -25,6 +25,7 @@
 #include "common/bus/bus_gk20a.h"
 #include "common/clock_gating/gp10b_gating_reglist.h"
 #include "common/ptimer/ptimer_gk20a.h"
+#include "common/bus/bus_gm20b.h"
 
 #include "gk20a/gk20a.h"
 #include "gk20a/fifo_gk20a.h"
@@ -651,7 +652,7 @@ static const struct gpu_ops gp10b_ops = {
         .bus = {
                 .init_hw = gk20a_bus_init_hw,
                 .isr = gk20a_bus_isr,
-                .bar1_bind = gk20a_bus_bar1_bind,
+                .bar1_bind = gm20b_bus_bar1_bind,
                 .set_bar0_window = gk20a_bus_set_bar0_window,
         },
         .ptimer = {
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
index 3fa78e54..c4ffe126 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -21,6 +21,7 @@
  */
 
 #include "common/bus/bus_gk20a.h"
+#include "common/bus/bus_gm20b.h"
 #include "common/clock_gating/gp10b_gating_reglist.h"
 
 #include "vgpu/fifo_vgpu.h"
@@ -523,7 +524,7 @@ static const struct gpu_ops vgpu_gp10b_ops = {
         .bus = {
                 .init_hw = gk20a_bus_init_hw,
                 .isr = gk20a_bus_isr,
-                .bar1_bind = gk20a_bus_bar1_bind,
+                .bar1_bind = gm20b_bus_bar1_bind,
                 .set_bar0_window = gk20a_bus_set_bar0_window,
         },
         .ptimer = {