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author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2016-11-22 13:46:55 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-11-30 12:19:23 -0500 |
commit | 4a8802eab42298493ea6c6f8ceceb0ffc0f1526a (patch) | |
tree | 2f6ac8022a3a3321dbf423671a856bbc953dd281 /drivers/gpu | |
parent | af5d2d208ada4d84c7a7bd0e4e0c288d1276225f (diff) |
gpu: nvgpu: chip specific channel commit_inst
Add function pointer to add chip specific commit_inst.
Update this function pointer for gk20a and gm20b.
JIRA GV11B-21
Change-Id: Iae7231fae70c7b4f56647fe242776670675de3fd
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1258275
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 12 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 1 |
4 files changed, 10 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 5539ca62..024be4db 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -312,6 +312,7 @@ struct gpu_ops { | |||
312 | u32 zcull_alloc_num, u32 *zcull_map_tiles); | 312 | u32 zcull_alloc_num, u32 *zcull_map_tiles); |
313 | int (*commit_global_timeslice)(struct gk20a *g, | 313 | int (*commit_global_timeslice)(struct gk20a *g, |
314 | struct channel_gk20a *c, bool patch); | 314 | struct channel_gk20a *c, bool patch); |
315 | int (*commit_inst)(struct channel_gk20a *c, u64 gpu_va); | ||
315 | } gr; | 316 | } gr; |
316 | const char *name; | 317 | const char *name; |
317 | struct { | 318 | struct { |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 3f5c4b4f..06d3a008 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -75,7 +75,6 @@ | |||
75 | #define FECS_ARB_CMD_TIMEOUT_DEFAULT 2 | 75 | #define FECS_ARB_CMD_TIMEOUT_DEFAULT 2 |
76 | 76 | ||
77 | static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g); | 77 | static int gk20a_init_gr_bind_fecs_elpg(struct gk20a *g); |
78 | static int gr_gk20a_commit_inst(struct channel_gk20a *c, u64 gpu_va); | ||
79 | 78 | ||
80 | /* global ctx buffer */ | 79 | /* global ctx buffer */ |
81 | static int gr_gk20a_alloc_global_ctx_buffers(struct gk20a *g); | 80 | static int gr_gk20a_alloc_global_ctx_buffers(struct gk20a *g); |
@@ -633,7 +632,7 @@ int gr_gk20a_halt_pipe(struct gk20a *g) | |||
633 | } | 632 | } |
634 | 633 | ||
635 | 634 | ||
636 | static int gr_gk20a_commit_inst(struct channel_gk20a *c, u64 gpu_va) | 635 | int gr_gk20a_commit_inst(struct channel_gk20a *c, u64 gpu_va) |
637 | { | 636 | { |
638 | u32 addr_lo; | 637 | u32 addr_lo; |
639 | u32 addr_hi; | 638 | u32 addr_hi; |
@@ -1690,7 +1689,7 @@ restore_fe_go_idle: | |||
1690 | 1689 | ||
1691 | gk20a_mem_wr(g, gold_mem, ctxsw_prog_main_image_zcull_ptr_o(), 0); | 1690 | gk20a_mem_wr(g, gold_mem, ctxsw_prog_main_image_zcull_ptr_o(), 0); |
1692 | 1691 | ||
1693 | gr_gk20a_commit_inst(c, ch_ctx->global_ctx_buffer_va[GOLDEN_CTX_VA]); | 1692 | g->ops.gr.commit_inst(c, ch_ctx->global_ctx_buffer_va[GOLDEN_CTX_VA]); |
1694 | 1693 | ||
1695 | gr_gk20a_fecs_ctx_image_save(c, gr_fecs_method_push_adr_wfi_golden_save_v()); | 1694 | gr_gk20a_fecs_ctx_image_save(c, gr_fecs_method_push_adr_wfi_golden_save_v()); |
1696 | 1695 | ||
@@ -1709,7 +1708,7 @@ restore_fe_go_idle: | |||
1709 | gr->ctx_vars.golden_image_size); | 1708 | gr->ctx_vars.golden_image_size); |
1710 | } | 1709 | } |
1711 | 1710 | ||
1712 | gr_gk20a_commit_inst(c, gr_mem->gpu_va); | 1711 | g->ops.gr.commit_inst(c, gr_mem->gpu_va); |
1713 | 1712 | ||
1714 | gr->ctx_vars.golden_image_initialized = true; | 1713 | gr->ctx_vars.golden_image_initialized = true; |
1715 | 1714 | ||
@@ -2063,7 +2062,7 @@ static int gr_gk20a_init_ctxsw_ucode_vaspace(struct gk20a *g) | |||
2063 | if (err) | 2062 | if (err) |
2064 | return err; | 2063 | return err; |
2065 | 2064 | ||
2066 | gk20a_init_inst_block(&ucode_info->inst_blk_desc, vm, 0); | 2065 | g->ops.mm.init_inst_block(&ucode_info->inst_blk_desc, vm, 0); |
2067 | 2066 | ||
2068 | /* Map ucode surface to GMMU */ | 2067 | /* Map ucode surface to GMMU */ |
2069 | ucode_info->surface_desc.gpu_va = gk20a_gmmu_map(vm, | 2068 | ucode_info->surface_desc.gpu_va = gk20a_gmmu_map(vm, |
@@ -3050,7 +3049,7 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a *c, | |||
3050 | ch_ctx->pm_ctx.pm_mode = ctxsw_prog_main_image_pm_mode_no_ctxsw_f(); | 3049 | ch_ctx->pm_ctx.pm_mode = ctxsw_prog_main_image_pm_mode_no_ctxsw_f(); |
3051 | 3050 | ||
3052 | /* commit gr ctx buffer */ | 3051 | /* commit gr ctx buffer */ |
3053 | err = gr_gk20a_commit_inst(c, ch_ctx->gr_ctx->mem.gpu_va); | 3052 | err = g->ops.gr.commit_inst(c, ch_ctx->gr_ctx->mem.gpu_va); |
3054 | if (err) { | 3053 | if (err) { |
3055 | gk20a_err(dev_from_gk20a(g), | 3054 | gk20a_err(dev_from_gk20a(g), |
3056 | "fail to commit gr ctx buffer"); | 3055 | "fail to commit gr ctx buffer"); |
@@ -9128,4 +9127,5 @@ void gk20a_init_gr_ops(struct gpu_ops *gops) | |||
9128 | gops->gr.setup_rop_mapping = gr_gk20a_setup_rop_mapping; | 9127 | gops->gr.setup_rop_mapping = gr_gk20a_setup_rop_mapping; |
9129 | gops->gr.program_zcull_mapping = gr_gk20a_program_zcull_mapping; | 9128 | gops->gr.program_zcull_mapping = gr_gk20a_program_zcull_mapping; |
9130 | gops->gr.commit_global_timeslice = gr_gk20a_commit_global_timeslice; | 9129 | gops->gr.commit_global_timeslice = gr_gk20a_commit_global_timeslice; |
9130 | gops->gr.commit_inst = gr_gk20a_commit_inst; | ||
9131 | } | 9131 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 662d9a87..33176df7 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -667,6 +667,8 @@ int gr_gk20a_commit_global_timeslice(struct gk20a *g, | |||
667 | 667 | ||
668 | void gr_gk20a_init_sm_id_table(struct gk20a *g); | 668 | void gr_gk20a_init_sm_id_table(struct gk20a *g); |
669 | 669 | ||
670 | int gr_gk20a_commit_inst(struct channel_gk20a *c, u64 gpu_va); | ||
671 | |||
670 | static inline const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode) | 672 | static inline const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode) |
671 | { | 673 | { |
672 | switch (graphics_preempt_mode) { | 674 | switch (graphics_preempt_mode) { |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index e71ca4a3..27c2df3d 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -1589,4 +1589,5 @@ void gm20b_init_gr(struct gpu_ops *gops) | |||
1589 | gops->gr.setup_rop_mapping = gr_gk20a_setup_rop_mapping; | 1589 | gops->gr.setup_rop_mapping = gr_gk20a_setup_rop_mapping; |
1590 | gops->gr.program_zcull_mapping = gr_gk20a_program_zcull_mapping; | 1590 | gops->gr.program_zcull_mapping = gr_gk20a_program_zcull_mapping; |
1591 | gops->gr.commit_global_timeslice = gr_gk20a_commit_global_timeslice; | 1591 | gops->gr.commit_global_timeslice = gr_gk20a_commit_global_timeslice; |
1592 | gops->gr.commit_inst = gr_gk20a_commit_inst; | ||
1592 | } | 1593 | } |