diff options
author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2017-06-01 00:56:20 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-01 18:34:08 -0400 |
commit | 48afa1c69cb9a19613bde49792d4d2cbae2f7011 (patch) | |
tree | fe6be5b756baf9b4af34e4498a438268a7cae2bf /drivers/gpu | |
parent | 39727398230bdb0fb01d9aa54e4cc572f6d39299 (diff) |
gpu: nvgpu: gv11b: set only valid soc credits
Only for following instances, mssnvlink <-> hshub will
be interacting in gv11b:
NV_ADDRESS_MAP_MSS_NVLINK_1_BASE
NV_ADDRESS_MAP_MSS_NVLINK_2_BASE
NV_ADDRESS_MAP_MSS_NVLINK_3_BASE
NV_ADDRESS_MAP_MSS_NVLINK_4_BASE
NV_ADDRESS_MAP_MSS_NVLINK_0_BASE doesnt interact with gv11b hshub,
so don't set those credits.
GPUT19X-116
Change-Id: I8c6737293699444ddb1e27936f1c4a2e61871c29
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1493641
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fb_gv11b.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fb_gv11b.c b/drivers/gpu/nvgpu/gv11b/fb_gv11b.c index 7bf7139e..975692a6 100644 --- a/drivers/gpu/nvgpu/gv11b/fb_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fb_gv11b.c | |||
@@ -31,7 +31,6 @@ | |||
31 | 31 | ||
32 | static void gv11b_init_nvlink_soc_credits(struct gk20a *g) | 32 | static void gv11b_init_nvlink_soc_credits(struct gk20a *g) |
33 | { | 33 | { |
34 | void __iomem *soc0 = ioremap(0x01f00010, 4096); //MSS_NVLINK_0_BASE | ||
35 | void __iomem *soc1 = ioremap(0x01f20010, 4096); //MSS_NVLINK_1_BASE | 34 | void __iomem *soc1 = ioremap(0x01f20010, 4096); //MSS_NVLINK_1_BASE |
36 | void __iomem *soc2 = ioremap(0x01f40010, 4096); //MSS_NVLINK_2_BASE | 35 | void __iomem *soc2 = ioremap(0x01f40010, 4096); //MSS_NVLINK_2_BASE |
37 | void __iomem *soc3 = ioremap(0x01f60010, 4096); //MSS_NVLINK_3_BASE | 36 | void __iomem *soc3 = ioremap(0x01f60010, 4096); //MSS_NVLINK_3_BASE |
@@ -41,11 +40,6 @@ static void gv11b_init_nvlink_soc_credits(struct gk20a *g) | |||
41 | /* TODO : replace this code with proper nvlink API */ | 40 | /* TODO : replace this code with proper nvlink API */ |
42 | nvgpu_info(g, "init nvlink soc credits"); | 41 | nvgpu_info(g, "init nvlink soc credits"); |
43 | 42 | ||
44 | val = readl_relaxed(soc0); | ||
45 | writel_relaxed(val, soc0); | ||
46 | val = readl_relaxed(soc0 + 4); | ||
47 | writel_relaxed(val, soc0 + 4); | ||
48 | |||
49 | val = readl_relaxed(soc1); | 43 | val = readl_relaxed(soc1); |
50 | writel_relaxed(val, soc1); | 44 | writel_relaxed(val, soc1); |
51 | val = readl_relaxed(soc1 + 4); | 45 | val = readl_relaxed(soc1 + 4); |