gpu: nvgpu: Use GPU device name in clock get operation

Used GPU device name in clock get operation (instead of fixed name),
to make operation is common for GK20A and GM20B. Updated clock ids
in tegra clock framework accordingly.

Bug 1450787

Change-Id: Ifd5b9c3a6fd8db5b06e6dcd989285e8410794803
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/441711
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>

2 files changed, 8 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
index 517e8e49..41305e3e 100644
--- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
@@ -415,11 +415,15 @@ struct clk *gk20a_clk_get(struct gk20a *g)
 {
         if (!g->clk.tegra_clk) {
                 struct clk *clk;
+                char clk_dev_id[32];
+                struct device *dev = dev_from_gk20a(g);
 
-                clk = clk_get_sys("tegra_gk20a", "gpu");
+                snprintf(clk_dev_id, 32, "tegra_%s", dev_name(dev));
+
+                clk = clk_get_sys(clk_dev_id, "gpu");
                 if (IS_ERR(clk)) {
-                        gk20a_err(dev_from_gk20a(g),
-                                "fail to get tegra gpu clk tegra_gk20a/gpu");
+                        gk20a_err(dev, "fail to get tegra gpu clk %s/gpu\n",
+                                  clk_dev_id);
                         return NULL;
                 }
                 g->clk.tegra_clk = clk;
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h
index debd6fbc..e6d14f74 100644
--- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h
@@ -59,13 +59,11 @@ struct clk_gk20a {
         bool debugfs_set;
 };
 
-/* APIs used for separate HAL */
-struct clk *gk20a_clk_get(struct gk20a *g);
-
 /* APIs used for both GK20A and GM20B */
 unsigned long gk20a_clk_get_rate(struct gk20a *g);
 int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate);
 long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate);
+struct clk *gk20a_clk_get(struct gk20a *g);
 
 #define KHZ 1000
 #define MHZ 1000000