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author | Thomas Fleury <tfleury@nvidia.com> | 2019-05-08 18:42:11 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2020-01-30 02:41:58 -0500 |
commit | 41a85b8d2a604c255483871fe09cf59585811d0c (patch) | |
tree | 9645a699e6d1fa293fcbd13d88e4b17c75a72ff6 /drivers/gpu | |
parent | dc281d6a9ebadaeb66dab092b40b7d6f4559ee39 (diff) |
gpu: nvgpu: enable MMU_DEBUG_MODE for gv11b
NV_PGPC_PRI_MMU_DEBUG_CTRL is now context switched in gv11b
FECS ucode. Enable NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, so that
userspace can use NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE
ioctl for gv11b.
Bug 2515097
Bug 2713590
Change-Id: Ia9fb36cffc9e67cf96c31c50ffa4c59997258ce2
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115019
(cherry picked from commit 3f9ea7dfd854d748c3d0fae52e2981bae1c8e650)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208768
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Kajetan Dutka <kdutka@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index d80bf0f0..2e2c3b8f 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -956,7 +956,7 @@ int gv11b_init_hal(struct gk20a *g) | |||
956 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); | 956 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); |
957 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); | 957 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); |
958 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, true); | 958 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, true); |
959 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, false); | 959 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, true); |
960 | 960 | ||
961 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); | 961 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); |
962 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_PLATFORM_ATOMIC, true); | 962 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_PLATFORM_ATOMIC, true); |