diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-03-01 14:56:23 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-03-07 05:35:01 -0500 |
commit | 3b0e010d14503d0a11ccf6417602e80014fcab69 (patch) | |
tree | e777a782716737ddc8019800a1eb90e742015b93 /drivers/gpu | |
parent | b0973391d051613746413f9e0d7f1e81b1f0402c (diff) |
gpu: nvgpu: add fifo ops for *client_type_gpc_v
*client_type_gpc_v is different for t19x
Change-Id: Ic8f8eff2d98138a877ef95c6f7f40226f0d61a61
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1313436
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 17 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 1 |
4 files changed, 15 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index e9eab551..d072fb48 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -1209,14 +1209,19 @@ static void gk20a_fifo_handle_dropped_mmu_fault(struct gk20a *g) | |||
1209 | gk20a_err(dev, "dropped mmu fault (0x%08x)", fault_id); | 1209 | gk20a_err(dev, "dropped mmu fault (0x%08x)", fault_id); |
1210 | } | 1210 | } |
1211 | 1211 | ||
1212 | bool gk20a_is_fault_engine_subid_gpc(struct gk20a *g, u32 engine_subid) | ||
1213 | { | ||
1214 | return (engine_subid == fifo_intr_mmu_fault_info_engine_subid_gpc_v()); | ||
1215 | } | ||
1216 | |||
1212 | static bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id, | 1217 | static bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id, |
1213 | struct fifo_mmu_fault_info_gk20a *f, bool fake_fault) | 1218 | u32 engine_subid, bool fake_fault) |
1214 | { | 1219 | { |
1215 | u32 engine_enum = ENGINE_INVAL_GK20A; | 1220 | u32 engine_enum = ENGINE_INVAL_GK20A; |
1216 | struct fifo_gk20a *fifo = NULL; | 1221 | struct fifo_gk20a *fifo = NULL; |
1217 | struct fifo_engine_info_gk20a *engine_info; | 1222 | struct fifo_engine_info_gk20a *engine_info; |
1218 | 1223 | ||
1219 | if (!g || !f) | 1224 | if (!g) |
1220 | return false; | 1225 | return false; |
1221 | 1226 | ||
1222 | fifo = &g->fifo; | 1227 | fifo = &g->fifo; |
@@ -1240,11 +1245,10 @@ static bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id, | |||
1240 | if (fake_fault) | 1245 | if (fake_fault) |
1241 | return false; | 1246 | return false; |
1242 | 1247 | ||
1243 | if (engine_enum != ENGINE_GR_GK20A || | 1248 | if (engine_enum != ENGINE_GR_GK20A) |
1244 | f->engine_subid_v != fifo_intr_mmu_fault_info_engine_subid_gpc_v()) | ||
1245 | return false; | 1249 | return false; |
1246 | 1250 | ||
1247 | return true; | 1251 | return g->ops.fifo.is_fault_engine_subid_gpc(g, engine_subid); |
1248 | } | 1252 | } |
1249 | 1253 | ||
1250 | /* caller must hold a channel reference */ | 1254 | /* caller must hold a channel reference */ |
@@ -1507,7 +1511,7 @@ static bool gk20a_fifo_handle_mmu_fault( | |||
1507 | 1511 | ||
1508 | /* check if engine reset should be deferred */ | 1512 | /* check if engine reset should be deferred */ |
1509 | if ((ch || tsg) && gk20a_fifo_should_defer_engine_reset(g, | 1513 | if ((ch || tsg) && gk20a_fifo_should_defer_engine_reset(g, |
1510 | engine_id, &f, fake_fault)) { | 1514 | engine_id, f.engine_subid_v, fake_fault)) { |
1511 | g->fifo.deferred_fault_engines |= BIT(engine_id); | 1515 | g->fifo.deferred_fault_engines |= BIT(engine_id); |
1512 | 1516 | ||
1513 | /* handled during channel free */ | 1517 | /* handled during channel free */ |
@@ -3355,4 +3359,5 @@ void gk20a_init_fifo(struct gpu_ops *gops) | |||
3355 | gops->fifo.runlist_entry_size = ram_rl_entry_size_v; | 3359 | gops->fifo.runlist_entry_size = ram_rl_entry_size_v; |
3356 | gops->fifo.get_tsg_runlist_entry = gk20a_get_tsg_runlist_entry; | 3360 | gops->fifo.get_tsg_runlist_entry = gk20a_get_tsg_runlist_entry; |
3357 | gops->fifo.get_ch_runlist_entry = gk20a_get_ch_runlist_entry; | 3361 | gops->fifo.get_ch_runlist_entry = gk20a_get_ch_runlist_entry; |
3362 | gops->fifo.is_fault_engine_subid_gpc = gk20a_is_fault_engine_subid_gpc; | ||
3358 | } | 3363 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 350bfa88..147d1bea 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | |||
@@ -274,6 +274,6 @@ void gk20a_get_ch_runlist_entry(struct channel_gk20a *ch, u32 *runlist); | |||
274 | 274 | ||
275 | u32 gk20a_userd_gp_get(struct gk20a *g, struct channel_gk20a *c); | 275 | u32 gk20a_userd_gp_get(struct gk20a *g, struct channel_gk20a *c); |
276 | void gk20a_userd_gp_put(struct gk20a *g, struct channel_gk20a *c); | 276 | void gk20a_userd_gp_put(struct gk20a *g, struct channel_gk20a *c); |
277 | 277 | bool gk20a_is_fault_engine_subid_gpc(struct gk20a *g, u32 engine_subid); | |
278 | 278 | ||
279 | #endif /*__GR_GK20A_H__*/ | 279 | #endif /*__GR_GK20A_H__*/ |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index b27b36d3..8ce682e3 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -433,6 +433,8 @@ struct gpu_ops { | |||
433 | u32 (*userd_gp_get)(struct gk20a *g, struct channel_gk20a *ch); | 433 | u32 (*userd_gp_get)(struct gk20a *g, struct channel_gk20a *ch); |
434 | void (*userd_gp_put)(struct gk20a *g, struct channel_gk20a *ch); | 434 | void (*userd_gp_put)(struct gk20a *g, struct channel_gk20a *ch); |
435 | void (*free_channel_ctx_header)(struct channel_gk20a *ch); | 435 | void (*free_channel_ctx_header)(struct channel_gk20a *ch); |
436 | bool (*is_fault_engine_subid_gpc)(struct gk20a *g, | ||
437 | u32 engine_subid); | ||
436 | } fifo; | 438 | } fifo; |
437 | struct pmu_v { | 439 | struct pmu_v { |
438 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ | 440 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ |
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index bd94a54b..696dd3a5 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -170,4 +170,5 @@ void gm20b_init_fifo(struct gpu_ops *gops) | |||
170 | gops->fifo.runlist_entry_size = ram_rl_entry_size_v; | 170 | gops->fifo.runlist_entry_size = ram_rl_entry_size_v; |
171 | gops->fifo.get_tsg_runlist_entry = gk20a_get_tsg_runlist_entry; | 171 | gops->fifo.get_tsg_runlist_entry = gk20a_get_tsg_runlist_entry; |
172 | gops->fifo.get_ch_runlist_entry = gk20a_get_ch_runlist_entry; | 172 | gops->fifo.get_ch_runlist_entry = gk20a_get_ch_runlist_entry; |
173 | gops->fifo.is_fault_engine_subid_gpc = gk20a_is_fault_engine_subid_gpc; | ||
173 | } | 174 | } |