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authorAingara Paramakuru <aparamakuru@nvidia.com>2015-08-27 13:53:47 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2015-09-29 11:12:15 -0400
commit39e8bff2fc02b4037dc925076e5f42f6519101eb (patch)
tree5ca1ff277226a8f69b9947a367a209c9d581fe02 /drivers/gpu
parentce4dd7ef86e5fec95bd8d2f90eb78e9643dd01d9 (diff)
gpu: nvgpu: vgpu: T18x support
Add vgpu framework and build for T18x. Bug 1677153 JIRA VFND-693 Change-Id: Icf9fd8e0b5769228aee59c54f9b000b992e5fcca Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/792559 Reviewed-on: http://git-master/r/806178 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/nvgpu/vgpu/gr_vgpu.c7
-rw-r--r--drivers/gpu/nvgpu/vgpu/mm_vgpu.c14
-rw-r--r--drivers/gpu/nvgpu/vgpu/vgpu.c10
3 files changed, 27 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
index 60a8f6c5..2b4b3c26 100644
--- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c
@@ -99,7 +99,7 @@ static int vgpu_gr_alloc_global_ctx_buffers(struct gk20a *g)
99 u32 cb_buffer_size = gr->bundle_cb_default_size * 99 u32 cb_buffer_size = gr->bundle_cb_default_size *
100 gr_scc_bundle_cb_size_div_256b_byte_granularity_v(); 100 gr_scc_bundle_cb_size_div_256b_byte_granularity_v();
101 101
102 u32 pagepool_buffer_size = gr_scc_pagepool_total_pages_hwmax_value_v() * 102 u32 pagepool_buffer_size = g->ops.gr.pagepool_default_size(g) *
103 gr_scc_pagepool_total_pages_byte_granularity_v(); 103 gr_scc_pagepool_total_pages_byte_granularity_v();
104 104
105 gk20a_dbg_fn(""); 105 gk20a_dbg_fn("");
@@ -530,6 +530,11 @@ static int vgpu_gr_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
530 &gr->max_tpc_count)) 530 &gr->max_tpc_count))
531 return -ENOMEM; 531 return -ENOMEM;
532 532
533 if (vgpu_get_attribute(platform->virt_handle,
534 TEGRA_VGPU_ATTRIB_TPC_COUNT,
535 &gr->tpc_count))
536 return -ENOMEM;
537
533 gr->gpc_tpc_mask = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL); 538 gr->gpc_tpc_mask = kzalloc(gr->gpc_count * sizeof(u32), GFP_KERNEL);
534 if (!gr->gpc_tpc_mask) { 539 if (!gr->gpc_tpc_mask) {
535 gk20a_err(dev_from_gk20a(g), "%s: out of memory\n", __func__); 540 gk20a_err(dev_from_gk20a(g), "%s: out of memory\n", __func__);
diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c
index 2b23c4e6..b5846043 100644
--- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c
@@ -53,9 +53,18 @@ static int vgpu_init_mm_setup_sw(struct gk20a *g)
53 53
54int vgpu_init_mm_support(struct gk20a *g) 54int vgpu_init_mm_support(struct gk20a *g)
55{ 55{
56 int err;
57
56 gk20a_dbg_fn(""); 58 gk20a_dbg_fn("");
57 59
58 return vgpu_init_mm_setup_sw(g); 60 err = vgpu_init_mm_setup_sw(g);
61 if (err)
62 return err;
63
64 if (g->ops.mm.init_mm_setup_hw)
65 err = g->ops.mm.init_mm_setup_hw(g);
66
67 return err;
59} 68}
60 69
61static u64 vgpu_locked_gmmu_map(struct vm_gk20a *vm, 70static u64 vgpu_locked_gmmu_map(struct vm_gk20a *vm,
@@ -275,7 +284,7 @@ static int vgpu_vm_alloc_share(struct gk20a_as_share *as_share,
275 for (i = 0; i < gmmu_nr_page_sizes; i++) 284 for (i = 0; i < gmmu_nr_page_sizes; i++)
276 vm->gmmu_page_sizes[i] = gmmu_page_sizes[i]; 285 vm->gmmu_page_sizes[i] = gmmu_page_sizes[i];
277 286
278 vm->big_pages = true; 287 vm->big_pages = !mm->disable_bigpage;
279 vm->big_page_size = big_page_size; 288 vm->big_page_size = big_page_size;
280 289
281 vm->va_start = big_page_size << 10; /* create a one pde hole */ 290 vm->va_start = big_page_size << 10; /* create a one pde hole */
@@ -450,4 +459,5 @@ void vgpu_init_mm_ops(struct gpu_ops *gops)
450 gops->mm.tlb_invalidate = vgpu_mm_tlb_invalidate; 459 gops->mm.tlb_invalidate = vgpu_mm_tlb_invalidate;
451 gops->mm.get_physical_addr_bits = gk20a_mm_get_physical_addr_bits; 460 gops->mm.get_physical_addr_bits = gk20a_mm_get_physical_addr_bits;
452 gops->mm.get_iova_addr = gk20a_mm_iova_addr; 461 gops->mm.get_iova_addr = gk20a_mm_iova_addr;
462 gops->mm.init_mm_setup_hw = NULL;
453} 463}
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c
index b2c08d68..6f91db4c 100644
--- a/drivers/gpu/nvgpu/vgpu/vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/vgpu.c
@@ -21,9 +21,12 @@
21#include "gk20a/debug_gk20a.h" 21#include "gk20a/debug_gk20a.h"
22#include "gk20a/hal_gk20a.h" 22#include "gk20a/hal_gk20a.h"
23#include "gk20a/hw_mc_gk20a.h" 23#include "gk20a/hw_mc_gk20a.h"
24
25#include "gm20b/hal_gm20b.h" 24#include "gm20b/hal_gm20b.h"
26 25
26#ifdef CONFIG_ARCH_TEGRA_18x_SOC
27#include "nvgpu_gpuid_t18x.h"
28#endif
29
27static inline int vgpu_comm_init(struct platform_device *pdev) 30static inline int vgpu_comm_init(struct platform_device *pdev)
28{ 31{
29 size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES }; 32 size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES };
@@ -270,6 +273,11 @@ static int vgpu_init_hal(struct gk20a *g)
270 gk20a_dbg_info("gm20b detected"); 273 gk20a_dbg_info("gm20b detected");
271 err = vgpu_gm20b_init_hal(g); 274 err = vgpu_gm20b_init_hal(g);
272 break; 275 break;
276#if defined(CONFIG_ARCH_TEGRA_18x_SOC)
277 case TEGRA_18x_GPUID:
278 err = TEGRA_18x_GPUID_VGPU_HAL(g);
279 break;
280#endif
273 default: 281 default:
274 gk20a_err(&g->dev->dev, "no support for %x", ver); 282 gk20a_err(&g->dev->dev, "no support for %x", ver);
275 err = -ENODEV; 283 err = -ENODEV;