gpu: nvgpu: Delete PMU fecs override interface

Deleted PMU fecs override interface from pmu_api.h
header file as feature not used anymore
& its dependent code too.

Deleted file pmu_api.h as file dont
have any interfaces left inside

Jira NVGPU-19

Change-Id: I490cf67ae60ce2f1de37da063199ee04835b940d
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1297370
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

6 files changed, 2 insertions, 142 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/pmu_api.h b/drivers/gpu/nvgpu/gk20a/pmu_api.h
deleted file mode 100644
index ad8a6903..00000000
--- a/drivers/gpu/nvgpu/gk20a/pmu_api.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2011-2017, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- */
-
-#ifndef __PMU_API_H__
-#define __PMU_API_H__
-
-#include <nvgpu/flcnif_cmn.h>
-#include "pmuif/gpmuif_pg_rppg.h"
-
-/* FECS mem override command*/
-
-#define PMU_LRF_TEX_LTC_DRAM_CMD_ID_EN_DIS   0
-
-/*!
- * Enable/Disable FECS error feature
- */
-struct pmu_cmd_lrf_tex_ltc_dram_en_dis {
-        /*Command type must be first*/
-        u8  cmd_type;
-        /*unit bitmask*/
-        u8  en_dis_mask;
-};
-
-struct pmu_lrf_tex_ltc_dram_cmd {
-        union {
-                u8 cmd_type;
-                struct pmu_cmd_lrf_tex_ltc_dram_en_dis en_dis;
-        };
-};
-
-/*  FECS mem override messages*/
-#define PMU_LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS    0
-
-struct pmu_msg_lrf_tex_ltc_dram_en_dis {
-        /*!
-         * Must be at start
-         */
-        u8 msg_type;
-        u8 en_fail_mask;
-        u8 dis_fail_mask;
-        u32 pmu_status;
-};
-
-struct pmu_lrf_tex_ltc_dram_msg {
-        union {
-                u8 msg_type;
-                struct pmu_msg_lrf_tex_ltc_dram_en_dis en_dis;
-        };
-};
-
-#endif /*__PMU_API_H__*/
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index 2f679970..47c2a4b3 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -22,7 +22,6 @@
 #define __PMU_GK20A_H__
 
 #include <linux/version.h>
-#include "pmu_api.h"
 #include <nvgpu/flcnif_cmn.h>
 #include "pmuif/nvgpu_gpmu_cmdif.h"
 
diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
index 3837fa60..b989e6a4 100644
--- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c
@@ -337,78 +337,6 @@ static int gp10b_init_pmu_setup_hw1(struct gk20a *g)
 
 }
 
-static void pmu_handle_ecc_en_dis_msg(struct gk20a *g, struct pmu_msg *msg,
-                        void *param, u32 handle, u32 status)
-{
-        struct pmu_gk20a *pmu = &g->pmu;
-        struct pmu_msg_lrf_tex_ltc_dram_en_dis *ecc =
-                        &msg->msg.lrf_tex_ltc_dram.en_dis;
-        gk20a_dbg_fn("");
-
-        if (status != 0) {
-                gk20a_err(dev_from_gk20a(g), "ECC en dis cmd aborted");
-                return;
-        }
-        if (msg->msg.lrf_tex_ltc_dram.msg_type !=
-                        PMU_LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS) {
-                gk20a_err(dev_from_gk20a(g),
-                        "Invalid msg for LRF_TEX_LTC_DRAM_CMD_ID_EN_DIS cmd");
-                return;
-        } else if (ecc->pmu_status != 0) {
-                gk20a_err(dev_from_gk20a(g),
-                        "LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS msg status = %x",
-                        ecc->pmu_status);
-                gk20a_err(dev_from_gk20a(g),
-                        "LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS msg en fail = %x",
-                        ecc->en_fail_mask);
-                gk20a_err(dev_from_gk20a(g),
-                        "LRF_TEX_LTC_DRAM_MSG_ID_EN_DIS msg dis fail = %x",
-                        ecc->dis_fail_mask);
-        } else
-                pmu->override_done = 1;
-        gk20a_dbg_fn("done");
-}
-
-static int send_ecc_overide_en_dis_cmd(struct gk20a *g, u32 bitmask)
-{
-        struct pmu_gk20a *pmu = &g->pmu;
-        struct pmu_cmd cmd;
-        u32 seq;
-        int status;
-        u32 val;
-        gk20a_dbg_fn("");
-
-        tegra_fuse_readl(FUSE_OPT_ECC_EN, &val);
-        if (!val) {
-                gk20a_err(dev_from_gk20a(g), "Board not ECC capable");
-                return -1;
-        }
-        if (!(g->acr.capabilities &
-                        ACR_LRF_TEX_LTC_DRAM_PRIV_MASK_ENABLE_LS_OVERRIDE)) {
-                gk20a_err(dev_from_gk20a(g), "check ACR capabilities");
-                return -1;
-        }
-        memset(&cmd, 0, sizeof(struct pmu_cmd));
-        cmd.hdr.unit_id = PMU_UNIT_FECS_MEM_OVERRIDE;
-        cmd.hdr.size = PMU_CMD_HDR_SIZE +
-                        sizeof(struct pmu_cmd_lrf_tex_ltc_dram_en_dis);
-        cmd.cmd.lrf_tex_ltc_dram.en_dis.cmd_type =
-                        PMU_LRF_TEX_LTC_DRAM_CMD_ID_EN_DIS;
-        cmd.cmd.lrf_tex_ltc_dram.en_dis.en_dis_mask = (u8)(bitmask & 0xff);
-
-        gp10b_dbg_pmu("cmd post PMU_ECC_CMD_ID_EN_DIS_ECC");
-        pmu->override_done = 0;
-        status = gk20a_pmu_cmd_post(g, &cmd, NULL, NULL, PMU_COMMAND_QUEUE_LPQ,
-                        pmu_handle_ecc_en_dis_msg, NULL, &seq, ~0);
-        if (status)
-                gk20a_err(dev_from_gk20a(g), "ECC override failed");
-        else
-                pmu_wait_message_cond(pmu, gk20a_get_gr_idle_timeout(g),
-                                      &pmu->override_done, 1);
-        gk20a_dbg_fn("done");
-        return status;
-}
-
 static bool gp10b_is_lazy_bootstrap(u32 falcon_id)
 {
         bool enable_status = false;
@@ -495,8 +423,7 @@ void gp10b_init_pmu_ops(struct gpu_ops *gops)
         gops->pmu.pmu_lpwr_enable_pg = NULL;
         gops->pmu.pmu_lpwr_disable_pg = NULL;
         gops->pmu.pmu_pg_param_post_init = NULL;
-        gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd =
-                        send_ecc_overide_en_dis_cmd;
+        gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL;
         gops->pmu.reset = gk20a_pmu_reset;
         gops->pmu.dump_secure_fuses = pmu_dump_security_fuses_gp10b;
 }
diff --git a/drivers/gpu/nvgpu/lpwr/lpwr.c b/drivers/gpu/nvgpu/lpwr/lpwr.c
index e3483cca..1dc37cd2 100644
--- a/drivers/gpu/nvgpu/lpwr/lpwr.c
+++ b/drivers/gpu/nvgpu/lpwr/lpwr.c
@@ -14,7 +14,6 @@
 #include "gk20a/gk20a.h"
 #include "gk20a/pmu_gk20a.h"
 #include "gp106/pmu_gp106.h"
-#include "gk20a/pmu_api.h"
 #include "gm206/bios_gm206.h"
 #include "pstate/pstate.h"
 #include "include/bios.h"
diff --git a/drivers/gpu/nvgpu/lpwr/rppg.c b/drivers/gpu/nvgpu/lpwr/rppg.c
index 40e857ee..cde57bf0 100644
--- a/drivers/gpu/nvgpu/lpwr/rppg.c
+++ b/drivers/gpu/nvgpu/lpwr/rppg.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -14,7 +14,6 @@
 #include "gk20a/gk20a.h"
 #include "gk20a/pmu_gk20a.h"
 #include "gp106/pmu_gp106.h"
-#include "gk20a/pmu_api.h"
 #include "gm206/bios_gm206.h"
 #include "pstate/pstate.h"
 #include "include/bios.h"
diff --git a/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h b/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h
index 751d6643..91175c69 100644
--- a/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h
+++ b/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h
@@ -13,7 +13,6 @@
 #ifndef _NVGPUGPMUCMDIF_H_
 #define _NVGPUGPMUCMDIF_H_
 
-#include "gk20a/pmu_api.h"
 #include <nvgpu/flcnif_cmn.h>
 #include "gpmuif_cmn.h"
 #include "gpmuif_pmu.h"
@@ -35,7 +34,6 @@ struct pmu_cmd {
                 struct pmu_pg_cmd pg;
                 struct pmu_zbc_cmd zbc;
                 struct pmu_acr_cmd acr;
-                struct pmu_lrf_tex_ltc_dram_cmd lrf_tex_ltc_dram;
                 struct nv_pmu_boardobj_cmd boardobj;
                 struct nv_pmu_perf_cmd perf;
                 struct nv_pmu_volt_cmd volt;
@@ -53,7 +51,6 @@ struct pmu_msg {
                 struct pmu_pg_msg pg;
                 struct pmu_rc_msg rc;
                 struct pmu_acr_msg acr;
-                struct pmu_lrf_tex_ltc_dram_msg lrf_tex_ltc_dram;
                 struct nv_pmu_boardobj_msg boardobj;
                 struct nv_pmu_perf_msg perf;
                 struct nv_pmu_volt_msg volt;