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author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2017-09-18 14:17:15 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-09-19 20:45:28 -0400 |
commit | 0420dd383e9aca0c764ad88979f88292603198d9 (patch) | |
tree | cd8e28d3a03e2c949e26521155dc45229d19b12c /drivers/gpu | |
parent | cedb24c7a09292ec8deee9ee17e1d7defeff0241 (diff) |
gpu: nvgpu: gv11b: Initialize ctxsw hdr counters
Initlize following context switch header counters for
gv11b:
ctxsw_prog_main_image_num_save_ops
ctxsw_prog_main_image_num_restore_ops
ctxsw_prog_main_image_num_wfi_save_ops
ctxsw_prog_main_image_num_cta_save_ops
ctxsw_prog_main_image_num_gfxp_save_ops
ctxsw_prog_main_image_num_cilp_save_ops
Reused gp10b gr hal function gr_gp10b_init_ctxsw_hdr_data()
for this.
Bug 1958308
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I10d83e35ccd8cba517ebaba1f0e5bec5a0f68ba5
Reviewed-on: https://git-master.nvidia.com/r/1562655
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 |
2 files changed, 1 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index ee49a8f2..50b819ac 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -2309,10 +2309,6 @@ void gv11b_restore_context_header(struct gk20a *g, | |||
2309 | ctxsw_prog_main_image_context_buffer_ptr_hi_o(), va_hi); | 2309 | ctxsw_prog_main_image_context_buffer_ptr_hi_o(), va_hi); |
2310 | nvgpu_mem_wr(g, ctxheader, | 2310 | nvgpu_mem_wr(g, ctxheader, |
2311 | ctxsw_prog_main_image_context_buffer_ptr_o(), va_lo); | 2311 | ctxsw_prog_main_image_context_buffer_ptr_o(), va_lo); |
2312 | nvgpu_mem_wr(g, ctxheader, | ||
2313 | ctxsw_prog_main_image_num_restore_ops_o(), 0); | ||
2314 | nvgpu_mem_wr(g, ctxheader, | ||
2315 | ctxsw_prog_main_image_num_save_ops_o(), 0); | ||
2316 | } | 2312 | } |
2317 | void gr_gv11b_write_zcull_ptr(struct gk20a *g, | 2313 | void gr_gv11b_write_zcull_ptr(struct gk20a *g, |
2318 | struct nvgpu_mem *mem, u64 gpu_va) | 2314 | struct nvgpu_mem *mem, u64 gpu_va) |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 2abd6243..be3f2456 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -343,6 +343,7 @@ static const struct gpu_ops gv11b_ops = { | |||
343 | .handle_tpc_sm_ecc_exception = | 343 | .handle_tpc_sm_ecc_exception = |
344 | gr_gv11b_handle_tpc_sm_ecc_exception, | 344 | gr_gv11b_handle_tpc_sm_ecc_exception, |
345 | .decode_egpc_addr = gv11b_gr_decode_egpc_addr, | 345 | .decode_egpc_addr = gv11b_gr_decode_egpc_addr, |
346 | .init_ctxsw_hdr_data = gr_gp10b_init_ctxsw_hdr_data, | ||
346 | }, | 347 | }, |
347 | .fb = { | 348 | .fb = { |
348 | .reset = gv11b_fb_reset, | 349 | .reset = gv11b_fb_reset, |