gpu: nvgpu: Falcon controller wait for halt

- Added nvgpu_flcn_wait_for_halt() interface to wait for
falcon halt, which block till falcon halt or timeout
expire for selected falcon controller

- Replaced falcon wait for halt code with method
nvgpu_flcn_wait_for_halt()

NVGPU JIRA-99

Change-Id: Ie1809dc29ff65bddc7ef2859a9ee9b4f0003b127
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1510201
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

5 files changed, 27 insertions, 39 deletions

diff --git a/drivers/gpu/nvgpu/common/falcon/falcon.c b/drivers/gpu/nvgpu/common/falcon/falcon.c
index b6589bd1..ba2fb3fe 100644
--- a/drivers/gpu/nvgpu/common/falcon/falcon.c
+++ b/drivers/gpu/nvgpu/common/falcon/falcon.c
@@ -102,6 +102,26 @@ bool nvgpu_flcn_get_cpu_halted_status(struct nvgpu_falcon *flcn)
         return status;
 }
 
+int nvgpu_flcn_wait_for_halt(struct nvgpu_falcon *flcn, unsigned int timeout)
+{
+        struct gk20a *g = flcn->g;
+        struct nvgpu_timeout to;
+        int status = 0;
+
+        nvgpu_timeout_init(g, &to, timeout, NVGPU_TIMER_CPU_TIMER);
+        do {
+                if (nvgpu_flcn_get_cpu_halted_status(flcn))
+                        break;
+
+                nvgpu_udelay(10);
+        } while (!nvgpu_timeout_expired(&to));
+
+        if (nvgpu_timeout_peek_expired(&to))
+                status = -EBUSY;
+
+        return status;
+}
+
 bool nvgpu_flcn_get_idle_status(struct nvgpu_falcon *flcn)
 {
         struct nvgpu_falcon_ops *flcn_ops = &flcn->flcn_ops;
diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.c b/drivers/gpu/nvgpu/gm206/bios_gm206.c
index 216fd594..7aec21e7 100644
--- a/drivers/gpu/nvgpu/gm206/bios_gm206.c
+++ b/drivers/gpu/nvgpu/gm206/bios_gm206.c
@@ -166,8 +166,6 @@ out:
 static int gm206_bios_preos(struct gk20a *g)
 {
         int err = 0;
-        int val;
-        struct nvgpu_timeout timeout;
 
         gk20a_dbg_fn("");
 
@@ -196,17 +194,8 @@ static int gm206_bios_preos(struct gk20a *g)
         gk20a_writel(g, pwr_falcon_cpuctl_r(),
                 pwr_falcon_cpuctl_startcpu_f(1));
 
-        nvgpu_timeout_init(g, &timeout,
-                           PMU_BOOT_TIMEOUT_MAX /
-                                PMU_BOOT_TIMEOUT_DEFAULT,
-                           NVGPU_TIMER_CPU_TIMER);
-        do {
-                val = pwr_falcon_cpuctl_halt_intr_v(
-                                gk20a_readl(g, pwr_falcon_cpuctl_r()));
-                nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT);
-        } while (!val && !nvgpu_timeout_expired(&timeout));
-
-        if (nvgpu_timeout_peek_expired(&timeout)) {
+        if (nvgpu_flcn_wait_for_halt(g->pmu.flcn,
+                PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT)) {
                 err = -ETIMEDOUT;
                 goto out;
         }
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index 08a58abb..e440e179 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -1488,22 +1488,11 @@ err_done:
 */
 static int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout_ms)
 {
+        struct nvgpu_pmu *pmu = &g->pmu;
         u32 data = 0;
         int ret = -EBUSY;
-        struct nvgpu_timeout timeout;
-
-        nvgpu_timeout_init(g, &timeout, timeout_ms, NVGPU_TIMER_CPU_TIMER);
-
-        do {
-                data = gk20a_readl(g, pwr_falcon_cpuctl_r());
-                if (data & pwr_falcon_cpuctl_halt_intr_m()) {
-                        /* CPU is halted break */
-                        ret = 0;
-                        break;
-                }
-                nvgpu_udelay(1);
-        } while (!nvgpu_timeout_expired(&timeout));
 
+        ret = nvgpu_flcn_wait_for_halt(pmu->flcn, timeout_ms);
         if (ret) {
                 nvgpu_err(g, "ACR boot timed out");
                 return ret;
diff --git a/drivers/gpu/nvgpu/gp106/sec2_gp106.c b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
index 06f62a99..20171309 100644
--- a/drivers/gpu/nvgpu/gp106/sec2_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/sec2_gp106.c
@@ -57,20 +57,9 @@ int sec2_clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout)
 int sec2_wait_for_halt(struct gk20a *g, unsigned int timeout)
 {
         u32 data = 0;
-        int completion = -EBUSY;
-        struct nvgpu_timeout to;
-
-        nvgpu_timeout_init(g, &to, timeout, NVGPU_TIMER_CPU_TIMER);
-        do {
-                data = gk20a_readl(g, psec_falcon_cpuctl_r());
-                if (data & psec_falcon_cpuctl_halt_intr_m()) {
-                        /*CPU is halted break*/
-                        completion = 0;
-                        break;
-                }
-                nvgpu_udelay(1);
-        } while (!nvgpu_timeout_expired(&to));
+        int completion = 0;
 
+        completion = nvgpu_flcn_wait_for_halt(&g->sec2_flcn, timeout);
         if (completion) {
                 nvgpu_err(g, "ACR boot timed out");
                 return completion;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/falcon.h b/drivers/gpu/nvgpu/include/nvgpu/falcon.h
index a1a57cd1..3079c79e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/falcon.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/falcon.h
@@ -166,6 +166,7 @@ struct nvgpu_falcon {
 };
 
 int nvgpu_flcn_wait_idle(struct nvgpu_falcon *flcn);
+int nvgpu_flcn_wait_for_halt(struct nvgpu_falcon *flcn, unsigned int timeout);
 int nvgpu_flcn_reset(struct nvgpu_falcon *flcn);
 void nvgpu_flcn_set_irq(struct nvgpu_falcon *flcn, bool enable,
         u32 intr_mask, u32 intr_dest);