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authorTerje Bergstrom <tbergstrom@nvidia.com>2015-05-21 11:22:51 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2015-06-01 13:44:20 -0400
commitf8cc28af38752354130506b8a9cecd86fd7aa48e (patch)
tree66ccde05d6761c10bd1c398632f87990a03571ec /drivers/gpu/nvgpu
parente19d349858d00fd97ab518376c90d6da9390510c (diff)
gpu: nvgpu: Use HAL for waiting for GR quiet
Create a HAL for waiting for GR to become quiet. Use it forall cases where we require GR to be quiet, but where it does not need to be idle. Bug 1640378 Change-Id: Ic0222d595a2d049e0fa8864b069ab94a97fac143 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/745640 Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c7
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c1
3 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 67a6123e..d77a9df2 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -173,6 +173,8 @@ struct gpu_ops {
173 u32 (*get_max_lts_per_ltc)(struct gk20a *g); 173 u32 (*get_max_lts_per_ltc)(struct gk20a *g);
174 u32* (*get_rop_l2_en_mask)(struct gk20a *g); 174 u32* (*get_rop_l2_en_mask)(struct gk20a *g);
175 void (*init_sm_dsm_reg_info)(void); 175 void (*init_sm_dsm_reg_info)(void);
176 int (*wait_empty)(struct gk20a *g, unsigned long end_jiffies,
177 u32 expect_delay);
176 } gr; 178 } gr;
177 const char *name; 179 const char *name;
178 struct { 180 struct {
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 78f81513..7c007622 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -3475,7 +3475,7 @@ void gr_gk20a_pmu_save_zbc(struct gk20a *g, u32 entries)
3475 return; 3475 return;
3476 } 3476 }
3477 3477
3478 ret = gr_gk20a_wait_idle(g, end_jiffies, GR_IDLE_CHECK_DEFAULT); 3478 ret = g->ops.gr.wait_empty(g, end_jiffies, GR_IDLE_CHECK_DEFAULT);
3479 if (ret) { 3479 if (ret) {
3480 gk20a_err(dev_from_gk20a(g), 3480 gk20a_err(dev_from_gk20a(g),
3481 "failed to idle graphics\n"); 3481 "failed to idle graphics\n");
@@ -3758,7 +3758,7 @@ static int _gk20a_gr_zbc_set_table(struct gk20a *g, struct gr_gk20a *gr,
3758 } 3758 }
3759 3759
3760 end_jiffies = jiffies + msecs_to_jiffies(gk20a_get_gr_idle_timeout(g)); 3760 end_jiffies = jiffies + msecs_to_jiffies(gk20a_get_gr_idle_timeout(g));
3761 ret = gr_gk20a_wait_idle(g, end_jiffies, GR_IDLE_CHECK_DEFAULT); 3761 ret = g->ops.gr.wait_empty(g, end_jiffies, GR_IDLE_CHECK_DEFAULT);
3762 if (ret) { 3762 if (ret) {
3763 gk20a_err(dev_from_gk20a(g), 3763 gk20a_err(dev_from_gk20a(g),
3764 "failed to idle graphics\n"); 3764 "failed to idle graphics\n");
@@ -5641,7 +5641,7 @@ int gk20a_gr_suspend(struct gk20a *g)
5641 5641
5642 gk20a_dbg_fn(""); 5642 gk20a_dbg_fn("");
5643 5643
5644 ret = gr_gk20a_wait_idle(g, end_jiffies, GR_IDLE_CHECK_DEFAULT); 5644 ret = g->ops.gr.wait_empty(g, end_jiffies, GR_IDLE_CHECK_DEFAULT);
5645 if (ret) 5645 if (ret)
5646 return ret; 5646 return ret;
5647 5647
@@ -7329,4 +7329,5 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
7329 gops->gr.get_max_lts_per_ltc = gr_gk20a_get_max_lts_per_ltc; 7329 gops->gr.get_max_lts_per_ltc = gr_gk20a_get_max_lts_per_ltc;
7330 gops->gr.get_rop_l2_en_mask = gr_gk20a_rop_l2_en_mask; 7330 gops->gr.get_rop_l2_en_mask = gr_gk20a_rop_l2_en_mask;
7331 gops->gr.init_sm_dsm_reg_info = gr_gk20a_init_sm_dsm_reg_info; 7331 gops->gr.init_sm_dsm_reg_info = gr_gk20a_init_sm_dsm_reg_info;
7332 gops->gr.wait_empty = gr_gk20a_wait_idle;
7332} 7333}
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 1fa1eb24..8351b554 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1117,4 +1117,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
1117 gops->gr.get_rop_l2_en_mask = gr_gm20b_rop_l2_en_mask; 1117 gops->gr.get_rop_l2_en_mask = gr_gm20b_rop_l2_en_mask;
1118 gops->gr.get_max_fbps_count = gr_gm20b_get_max_fbps_count; 1118 gops->gr.get_max_fbps_count = gr_gm20b_get_max_fbps_count;
1119 gops->gr.init_sm_dsm_reg_info = gr_gm20b_init_sm_dsm_reg_info; 1119 gops->gr.init_sm_dsm_reg_info = gr_gm20b_init_sm_dsm_reg_info;
1120 gops->gr.wait_empty = gr_gk20a_wait_idle;
1120} 1121}