diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-11-11 04:13:41 -0500 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:02 -0500 |
commit | e8c5b7dd170d4bf9c49c90c4f0e8eb0e8b17c9b2 (patch) | |
tree | 612783544fe542e409567a104d43704147d28b49 /drivers/gpu/nvgpu | |
parent | 2d23236ae26ec6dcbbc934bb372fe56ef839bb80 (diff) |
gpu: nvgpu: Add SM registers
Add SM registers which were taken into use in GPU
characteristics.
Bug 1551769
Bug 1558186
Change-Id: I705da9ac25556b6b94137199e0acd9af3c8e6422
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/601020
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h index 372c5e51..ca4aa6bd 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | |||
@@ -1866,6 +1866,22 @@ static inline u32 gr_gpc0_tpc0_sm_cfg_sm_id_f(u32 v) | |||
1866 | { | 1866 | { |
1867 | return (v & 0xffff) << 0; | 1867 | return (v & 0xffff) << 0; |
1868 | } | 1868 | } |
1869 | static inline u32 gr_gpc0_tpc0_sm_arch_r(void) | ||
1870 | { | ||
1871 | return 0x0050469c; | ||
1872 | } | ||
1873 | static inline u32 gr_gpc0_tpc0_sm_arch_warp_count_v(u32 r) | ||
1874 | { | ||
1875 | return (r >> 0) & 0xff; | ||
1876 | } | ||
1877 | static inline u32 gr_gpc0_tpc0_sm_arch_spa_version_v(u32 r) | ||
1878 | { | ||
1879 | return (r >> 8) & 0xfff; | ||
1880 | } | ||
1881 | static inline u32 gr_gpc0_tpc0_sm_arch_sm_version_v(u32 r) | ||
1882 | { | ||
1883 | return (r >> 20) & 0xfff; | ||
1884 | } | ||
1869 | static inline u32 gr_gpc0_ppc0_pes_vsc_strem_r(void) | 1885 | static inline u32 gr_gpc0_ppc0_pes_vsc_strem_r(void) |
1870 | { | 1886 | { |
1871 | return 0x00503018; | 1887 | return 0x00503018; |