diff options
author | Richard Zhao <rizhao@nvidia.com> | 2016-02-26 14:33:08 -0500 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-14 13:10:24 -0400 |
commit | e7664f9345772de177fbe20cf415d2fbc6f55d83 (patch) | |
tree | 728d3686e5243ef2e516c3a85e1995d90ebee839 /drivers/gpu/nvgpu | |
parent | 8bd22faafdf6fa37f1e0fa523f639b2bca2e868c (diff) |
gpu: nvgpu: make tpc_fs_mask work on production board
On production fused boards, it uses gr_fe_tpc_fs_r() to mask TPCs,
rather than fues.
Bug 1734150
Change-Id: I7b4eb428f1ad0cf841a57214e0c8c1e8f17b2c5a
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1111630
(cherry picked from commit 869ea54967812e03d9f1e69775ca56fd6459216c)
Reviewed-on: http://git-master/r/1122121
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 9 |
3 files changed, 11 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index db5cb56d..71271a2c 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -697,6 +697,8 @@ struct gk20a { | |||
697 | 697 | ||
698 | struct gk20a_cde_app cde_app; | 698 | struct gk20a_cde_app cde_app; |
699 | bool mmu_debug_ctrl; | 699 | bool mmu_debug_ctrl; |
700 | |||
701 | u32 tpc_fs_mask_user; | ||
700 | }; | 702 | }; |
701 | 703 | ||
702 | static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) | 704 | static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c index 9d25cfdd..29c92398 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | |||
@@ -691,6 +691,7 @@ static ssize_t tpc_fs_mask_store(struct device *dev, | |||
691 | 691 | ||
692 | if (val && val != g->gr.gpc_tpc_mask[0] && g->ops.gr.set_gpc_tpc_mask) { | 692 | if (val && val != g->gr.gpc_tpc_mask[0] && g->ops.gr.set_gpc_tpc_mask) { |
693 | g->gr.gpc_tpc_mask[0] = val; | 693 | g->gr.gpc_tpc_mask[0] = val; |
694 | g->tpc_fs_mask_user = val; | ||
694 | 695 | ||
695 | g->ops.gr.set_gpc_tpc_mask(g, 0); | 696 | g->ops.gr.set_gpc_tpc_mask(g, 0); |
696 | 697 | ||
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 6a79b1ac..050c2bee 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -592,7 +592,14 @@ int gr_gm20b_ctx_state_floorsweep(struct gk20a *g) | |||
592 | for (pes_index = 0; pes_index < gr->pe_count_per_gpc; | 592 | for (pes_index = 0; pes_index < gr->pe_count_per_gpc; |
593 | pes_index++) | 593 | pes_index++) |
594 | pes_tpc_mask |= gr->pes_tpc_mask[pes_index][gpc_index]; | 594 | pes_tpc_mask |= gr->pes_tpc_mask[pes_index][gpc_index]; |
595 | gk20a_writel(g, gr_fe_tpc_fs_r(), pes_tpc_mask); | 595 | if (g->tpc_fs_mask_user && g->ops.gr.get_gpc_tpc_mask(g, 0) == |
596 | (0x1 << gr->max_tpc_count) - 1) { | ||
597 | u32 val = g->tpc_fs_mask_user; | ||
598 | val &= (0x1 << gr->max_tpc_count) - 1; | ||
599 | gk20a_writel(g, gr_fe_tpc_fs_r(), val); | ||
600 | } else { | ||
601 | gk20a_writel(g, gr_fe_tpc_fs_r(), pes_tpc_mask); | ||
602 | } | ||
596 | 603 | ||
597 | for (tpc_index = 0; tpc_index < gr->tpc_count; tpc_index++) { | 604 | for (tpc_index = 0; tpc_index < gr->tpc_count; tpc_index++) { |
598 | if (tpc_index == 0) { | 605 | if (tpc_index == 0) { |