gpu: nvgpu: Move SW scratch register read to bus

SW scratch register is in bus register range. Move query of that
register to bus HAL from bios.

JIRA NVGPU-588

Change-Id: I69f35af3d5f8da3550eb68fe7d060a3ec48ce275
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1730898
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

6 files changed, 86 insertions, 12 deletions

diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile
index 3cbe5b96..c75e1417 100644
--- a/drivers/gpu/nvgpu/Makefile
+++ b/drivers/gpu/nvgpu/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_GK20A) := nvgpu.o
 nvgpu-y += common/bus/bus_gk20a.o \
         common/bus/bus_gm20b.o \
         common/bus/bus_gp10b.o \
+        common/bus/bus_gv100.o \
         common/ptimer/ptimer.o \
         common/ptimer/ptimer_gk20a.o
 
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gv100.c b/drivers/gpu/nvgpu/common/bus/bus_gv100.c
new file mode 100644
index 00000000..2aa15e67
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/bus/bus_gv100.c
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <nvgpu/timers.h>
+#include <nvgpu/mm.h>
+
+#include "bus_gv100.h"
+#include "gk20a/gk20a.h"
+
+#include <nvgpu/hw/gv100/hw_bus_gv100.h>
+
+u32 gv100_bus_read_sw_scratch(struct gk20a *g, u32 index)
+{
+        return gk20a_readl(g, bus_sw_scratch_r(index));
+}
+
+void gv100_bus_write_sw_scratch(struct gk20a *g, u32 index, u32 val)
+{
+        gk20a_writel(g, bus_sw_scratch_r(index), val);
+}
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gv100.h b/drivers/gpu/nvgpu/common/bus/bus_gv100.h
new file mode 100644
index 00000000..b6b608da
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/bus/bus_gv100.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef NVGPU_GV100_BUS
+#define NVGPU_GV100_BUS
+
+#include <nvgpu/types.h>
+
+struct gk20a;
+
+u32 gv100_bus_read_sw_scratch(struct gk20a *g, u32 index);
+void gv100_bus_write_sw_scratch(struct gk20a *g, u32 index, u32 val);
+
+#endif
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index d8941cdf..5440238f 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -1124,6 +1124,8 @@ struct gpu_ops {
                 u32 (*set_bar0_window)(struct gk20a *g, struct nvgpu_mem *mem,
                         struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl,
                         u32 w);
+                u32 (*read_sw_scratch)(struct gk20a *g, u32 index);
+                void (*write_sw_scratch)(struct gk20a *g, u32 index, u32 val);
         } bus;
 
         struct {
diff --git a/drivers/gpu/nvgpu/gv100/bios_gv100.c b/drivers/gpu/nvgpu/gv100/bios_gv100.c
index 9ca05a11..45d5ed31 100644
--- a/drivers/gpu/nvgpu/gv100/bios_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/bios_gv100.c
@@ -29,7 +29,6 @@
 #include "bios_gv100.h"
 
 #include <nvgpu/hw/gv100/hw_pwr_gv100.h>
-#include <nvgpu/hw/gv100/hw_bus_gv100.h>
 
 #define PMU_BOOT_TIMEOUT_DEFAULT        100 /* usec */
 #define PMU_BOOT_TIMEOUT_MAX            2000000 /* usec */
@@ -53,14 +52,13 @@
 
 void gv100_bios_preos_reload_check(struct gk20a *g)
 {
-        u32 progress = gk20a_readl(g,
-                                bus_sw_scratch_r(SCRATCH_PREOS_PROGRESS));
+        u32 progress = g->ops.bus.read_sw_scratch(g, SCRATCH_PREOS_PROGRESS);
 
         if (PREOS_PROGRESS_MASK(progress) != PREOS_PROGRESS_NOT_STARTED) {
-                u32 reload = gk20a_readl(g,
-                                bus_sw_scratch_r(SCRATCH_PRE_OS_RELOAD));
+                u32 reload = g->ops.bus.read_sw_scratch(g,
+                                SCRATCH_PRE_OS_RELOAD);
 
-                gk20a_writel(g, bus_sw_scratch_r(SCRATCH_PRE_OS_RELOAD),
+                g->ops.bus.write_sw_scratch(g, SCRATCH_PRE_OS_RELOAD,
                         PRE_OS_RELOAD_SET(reload, PRE_OS_RELOAD_YES));
         }
 }
@@ -76,16 +74,15 @@ int gv100_bios_preos_wait_for_halt(struct gk20a *g)
         nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT);
 
         /* Check the progress */
-        progress = gk20a_readl(g, bus_sw_scratch_r(SCRATCH_PREOS_PROGRESS));
+        progress = g->ops.bus.read_sw_scratch(g, SCRATCH_PREOS_PROGRESS);
 
         if (PREOS_PROGRESS_MASK(progress) == PREOS_PROGRESS_STARTED) {
                 err = 0;
 
                 /* Complete the handshake */
-                tmp = gk20a_readl(g,
-                        bus_sw_scratch_r(SCRATCH_PMU_EXIT_AND_HALT));
+                tmp = g->ops.bus.read_sw_scratch(g, SCRATCH_PMU_EXIT_AND_HALT);
 
-                gk20a_writel(g, bus_sw_scratch_r(SCRATCH_PMU_EXIT_AND_HALT),
+                g->ops.bus.write_sw_scratch(g, SCRATCH_PMU_EXIT_AND_HALT,
                         PMU_EXIT_AND_HALT_SET(tmp, PMU_EXIT_AND_HALT_YES));
 
                 nvgpu_timeout_init(g, &timeout,
@@ -94,8 +91,7 @@ int gv100_bios_preos_wait_for_halt(struct gk20a *g)
                            NVGPU_TIMER_RETRY_TIMER);
 
                 do {
-                        progress = gk20a_readl(g,
-                                bus_sw_scratch_r(SCRATCH_PREOS_PROGRESS));
+                        progress = g->ops.bus.read_sw_scratch(g, SCRATCH_PREOS_PROGRESS);
                         preos_completed = pwr_falcon_cpuctl_halt_intr_v(
                                 gk20a_readl(g, pwr_falcon_cpuctl_r())) &&
                                         (PREOS_PROGRESS_MASK(progress) ==
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c
index 13e0c1a3..56429975 100644
--- a/drivers/gpu/nvgpu/gv100/hal_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c
@@ -24,6 +24,7 @@
 
 #include "common/bus/bus_gk20a.h"
 #include "common/bus/bus_gp10b.h"
+#include "common/bus/bus_gv100.h"
 #include "common/clock_gating/gv100_gating_reglist.h"
 #include "common/ptimer/ptimer_gk20a.h"
 
@@ -794,6 +795,8 @@ static const struct gpu_ops gv100_ops = {
                 .bar1_bind = NULL,
                 .bar2_bind = gp10b_bus_bar2_bind,
                 .set_bar0_window = gk20a_bus_set_bar0_window,
+                .read_sw_scratch = gv100_bus_read_sw_scratch,
+                .write_sw_scratch = gv100_bus_write_sw_scratch,
         },
         .ptimer = {
                 .isr = gk20a_ptimer_isr,