diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2018-04-09 10:26:59 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-04-10 14:23:30 -0400 |
commit | d91ea322e1a6ae51ae8e017d09bfaf3e139ecf2d (patch) | |
tree | c8f95d7f89ad3a7cec265ee0b69b619119af161e /drivers/gpu/nvgpu | |
parent | aa1f8e01ced661b640ee612f6a7bd201f0bbd6a4 (diff) |
gpu: nvgpu: fix gpc/tpc index for SMPC broadcast conversion
In gv11b_gr_egpc_etpc_priv_addr_table(), we call
gv11b_gr_update_priv_addr_table_smpc() to convert SMPC broadcast address into
list of unicast addresses
But before calling gv11b_gr_update_priv_addr_table_smpc() we sometimes
incorrectly set gpc_num/tpc_num to zero and that leads to generating incorrect
list of unicast addresses
Remove this incorrect initialization of gpc_num/tpc_num
Also update gv11b_gr_egpc_etpc_priv_addr_table() to receive tpc_num along with
gpc_num
Bug 2099717
Jira NVGPU-580
Change-Id: Idd4e5f78dbe6ca1800efae93c66355d06417d1f2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1691373
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 2 |
4 files changed, 9 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index c2a8d6ce..e3b37747 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -244,7 +244,8 @@ struct gpu_ops { | |||
244 | u32 addr, int *addr_type, | 244 | u32 addr, int *addr_type, |
245 | u32 *gpc_num, u32 *tpc_num, u32 *broadcast_flags); | 245 | u32 *gpc_num, u32 *tpc_num, u32 *broadcast_flags); |
246 | void (*egpc_etpc_priv_addr_table)(struct gk20a *g, u32 addr, | 246 | void (*egpc_etpc_priv_addr_table)(struct gk20a *g, u32 addr, |
247 | u32 gpc, u32 broadcast_flags, u32 *priv_addr_table, | 247 | u32 gpc, u32 tpc, u32 broadcast_flags, |
248 | u32 *priv_addr_table, | ||
248 | u32 *priv_addr_table_index); | 249 | u32 *priv_addr_table_index); |
249 | bool (*is_tpc_addr)(struct gk20a *g, u32 addr); | 250 | bool (*is_tpc_addr)(struct gk20a *g, u32 addr); |
250 | bool (*is_egpc_addr)(struct gk20a *g, u32 addr); | 251 | bool (*is_egpc_addr)(struct gk20a *g, u32 addr); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index e4344b9f..96bc72af 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -6421,7 +6421,7 @@ int gr_gk20a_create_priv_addr_table(struct gk20a *g, | |||
6421 | (addr_type == CTXSW_ADDR_TYPE_ETPC)) && | 6421 | (addr_type == CTXSW_ADDR_TYPE_ETPC)) && |
6422 | g->ops.gr.egpc_etpc_priv_addr_table) { | 6422 | g->ops.gr.egpc_etpc_priv_addr_table) { |
6423 | gk20a_dbg(gpu_dbg_gpu_dbg, "addr_type : EGPC/ETPC"); | 6423 | gk20a_dbg(gpu_dbg_gpu_dbg, "addr_type : EGPC/ETPC"); |
6424 | g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, | 6424 | g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, tpc_num, |
6425 | broadcast_flags, priv_addr_table, &t); | 6425 | broadcast_flags, priv_addr_table, &t); |
6426 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { | 6426 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { |
6427 | g->ops.gr.split_lts_broadcast_addr(g, addr, | 6427 | g->ops.gr.split_lts_broadcast_addr(g, addr, |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index f8461f9d..dfb14db7 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -4018,9 +4018,9 @@ static void gv11b_gr_update_priv_addr_table_smpc(struct gk20a *g, u32 gpc_num, | |||
4018 | } | 4018 | } |
4019 | 4019 | ||
4020 | void gv11b_gr_egpc_etpc_priv_addr_table(struct gk20a *g, u32 addr, | 4020 | void gv11b_gr_egpc_etpc_priv_addr_table(struct gk20a *g, u32 addr, |
4021 | u32 gpc, u32 broadcast_flags, u32 *priv_addr_table, u32 *t) | 4021 | u32 gpc_num, u32 tpc_num, u32 broadcast_flags, |
4022 | u32 *priv_addr_table, u32 *t) | ||
4022 | { | 4023 | { |
4023 | u32 gpc_num, tpc_num; | ||
4024 | u32 priv_addr, gpc_addr; | 4024 | u32 priv_addr, gpc_addr; |
4025 | 4025 | ||
4026 | nvgpu_log_info(g, "addr=0x%x", addr); | 4026 | nvgpu_log_info(g, "addr=0x%x", addr); |
@@ -4055,7 +4055,6 @@ void gv11b_gr_egpc_etpc_priv_addr_table(struct gk20a *g, u32 addr, | |||
4055 | } | 4055 | } |
4056 | } | 4056 | } |
4057 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_SMPC) { | 4057 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_SMPC) { |
4058 | tpc_num = 0; | ||
4059 | gv11b_gr_update_priv_addr_table_smpc( | 4058 | gv11b_gr_update_priv_addr_table_smpc( |
4060 | g, gpc_num, tpc_num, addr, | 4059 | g, gpc_num, tpc_num, addr, |
4061 | priv_addr_table, t); | 4060 | priv_addr_table, t); |
@@ -4078,9 +4077,8 @@ void gv11b_gr_egpc_etpc_priv_addr_table(struct gk20a *g, u32 addr, | |||
4078 | } else if (!(broadcast_flags & PRI_BROADCAST_FLAGS_EGPC)) { | 4077 | } else if (!(broadcast_flags & PRI_BROADCAST_FLAGS_EGPC)) { |
4079 | if (broadcast_flags & PRI_BROADCAST_FLAGS_ETPC) { | 4078 | if (broadcast_flags & PRI_BROADCAST_FLAGS_ETPC) { |
4080 | nvgpu_log_info(g, "broadcast flags etpc but not egpc"); | 4079 | nvgpu_log_info(g, "broadcast flags etpc but not egpc"); |
4081 | gpc_num = 0; | ||
4082 | for (tpc_num = 0; | 4080 | for (tpc_num = 0; |
4083 | tpc_num < g->gr.gpc_tpc_count[gpc]; | 4081 | tpc_num < g->gr.gpc_tpc_count[gpc_num]; |
4084 | tpc_num++) { | 4082 | tpc_num++) { |
4085 | if (broadcast_flags & | 4083 | if (broadcast_flags & |
4086 | PRI_BROADCAST_FLAGS_SMPC) | 4084 | PRI_BROADCAST_FLAGS_SMPC) |
@@ -4091,7 +4089,7 @@ void gv11b_gr_egpc_etpc_priv_addr_table(struct gk20a *g, u32 addr, | |||
4091 | priv_addr_table[*t] = | 4089 | priv_addr_table[*t] = |
4092 | pri_etpc_addr(g, | 4090 | pri_etpc_addr(g, |
4093 | pri_tpccs_addr_mask(addr), | 4091 | pri_tpccs_addr_mask(addr), |
4094 | gpc, tpc_num); | 4092 | gpc_num, tpc_num); |
4095 | nvgpu_log_info(g, | 4093 | nvgpu_log_info(g, |
4096 | "priv_addr_table[%d]:%#08x", | 4094 | "priv_addr_table[%d]:%#08x", |
4097 | *t, priv_addr_table[*t]); | 4095 | *t, priv_addr_table[*t]); |
@@ -4099,8 +4097,6 @@ void gv11b_gr_egpc_etpc_priv_addr_table(struct gk20a *g, u32 addr, | |||
4099 | } | 4097 | } |
4100 | } | 4098 | } |
4101 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_SMPC) { | 4099 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_SMPC) { |
4102 | tpc_num = 0; | ||
4103 | gpc_num = 0; | ||
4104 | gv11b_gr_update_priv_addr_table_smpc( | 4100 | gv11b_gr_update_priv_addr_table_smpc( |
4105 | g, gpc_num, tpc_num, addr, | 4101 | g, gpc_num, tpc_num, addr, |
4106 | priv_addr_table, t); | 4102 | priv_addr_table, t); |
@@ -4666,7 +4662,7 @@ int gr_gv11b_create_priv_addr_table(struct gk20a *g, | |||
4666 | (addr_type == CTXSW_ADDR_TYPE_ETPC)) && | 4662 | (addr_type == CTXSW_ADDR_TYPE_ETPC)) && |
4667 | g->ops.gr.egpc_etpc_priv_addr_table) { | 4663 | g->ops.gr.egpc_etpc_priv_addr_table) { |
4668 | gk20a_dbg(gpu_dbg_gpu_dbg, "addr_type : EGPC/ETPC"); | 4664 | gk20a_dbg(gpu_dbg_gpu_dbg, "addr_type : EGPC/ETPC"); |
4669 | g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, | 4665 | g->ops.gr.egpc_etpc_priv_addr_table(g, addr, gpc_num, tpc_num, |
4670 | broadcast_flags, priv_addr_table, &t); | 4666 | broadcast_flags, priv_addr_table, &t); |
4671 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { | 4667 | } else if (broadcast_flags & PRI_BROADCAST_FLAGS_LTSS) { |
4672 | g->ops.gr.split_lts_broadcast_addr(g, addr, | 4668 | g->ops.gr.split_lts_broadcast_addr(g, addr, |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index 1a3a851e..398731a4 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h | |||
@@ -214,7 +214,7 @@ void gv11b_gr_get_egpc_etpc_num(struct gk20a *g, u32 addr, | |||
214 | int gv11b_gr_decode_egpc_addr(struct gk20a *g, u32 addr, int *addr_type, | 214 | int gv11b_gr_decode_egpc_addr(struct gk20a *g, u32 addr, int *addr_type, |
215 | u32 *gpc_num, u32 *tpc_num, u32 *broadcast_flags); | 215 | u32 *gpc_num, u32 *tpc_num, u32 *broadcast_flags); |
216 | void gv11b_gr_egpc_etpc_priv_addr_table(struct gk20a *g, u32 addr, | 216 | void gv11b_gr_egpc_etpc_priv_addr_table(struct gk20a *g, u32 addr, |
217 | u32 gpc, u32 broadcast_flags, u32 *priv_addr_table, u32 *t); | 217 | u32 gpc, u32 tpc, u32 broadcast_flags, u32 *priv_addr_table, u32 *t); |
218 | u32 gv11b_gr_get_egpc_base(struct gk20a *g); | 218 | u32 gv11b_gr_get_egpc_base(struct gk20a *g); |
219 | void gr_gv11b_init_gpc_mmu(struct gk20a *g); | 219 | void gr_gv11b_init_gpc_mmu(struct gk20a *g); |
220 | int gr_gv11b_init_preemption_state(struct gk20a *g); | 220 | int gr_gv11b_init_preemption_state(struct gk20a *g); |