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authorTerje Bergstrom <tbergstrom@nvidia.com>2014-05-15 06:57:09 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:09:54 -0400
commitd78dca61e0eb92e69e1fa5650c0e946a21a930d2 (patch)
tree98d85525d73bc68d3260b037d94d4310cc671d7b /drivers/gpu/nvgpu
parentc079c38d7529f918101a4d28260b101a35ebaf33 (diff)
gpu: nvgpu: Remove deferred ELPG enable
Prevent the disable ELPG routine from calling deferred re enablement of ELPG. Remove code related to deferred ELPG enable.. Change-Id: I9401e6e0f26a4e332e50eb38439e2ef6fcb4225d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/410203 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.c54
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.h2
2 files changed, 2 insertions, 54 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index 33cecfb4..482abbc8 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -1509,8 +1509,6 @@ int gk20a_init_pmu_reset_enable_hw(struct gk20a *g)
1509 return 0; 1509 return 0;
1510} 1510}
1511 1511
1512static void pmu_elpg_enable_allow(struct work_struct *work);
1513
1514int gk20a_init_pmu_setup_sw(struct gk20a *g) 1512int gk20a_init_pmu_setup_sw(struct gk20a *g)
1515{ 1513{
1516 struct pmu_gk20a *pmu = &g->pmu; 1514 struct pmu_gk20a *pmu = &g->pmu;
@@ -1583,7 +1581,6 @@ int gk20a_init_pmu_setup_sw(struct gk20a *g)
1583 pmu->desc->descriptor_size); 1581 pmu->desc->descriptor_size);
1584 1582
1585 1583
1586 INIT_DELAYED_WORK(&pmu->elpg_enable, pmu_elpg_enable_allow);
1587 INIT_WORK(&pmu->pg_init, gk20a_init_pmu_setup_hw2_workqueue); 1584 INIT_WORK(&pmu->pg_init, gk20a_init_pmu_setup_hw2_workqueue);
1588 1585
1589 dma_set_attr(DMA_ATTR_READ_ONLY, &attrs); 1586 dma_set_attr(DMA_ATTR_READ_ONLY, &attrs);
@@ -3222,13 +3219,6 @@ int gk20a_pmu_enable_elpg(struct gk20a *g)
3222 if (pmu->elpg_stat != PMU_ELPG_STAT_OFF) 3219 if (pmu->elpg_stat != PMU_ELPG_STAT_OFF)
3223 goto exit_unlock; 3220 goto exit_unlock;
3224 3221
3225 /* if ELPG is not allowed right now, mark that it should be enabled
3226 * immediately after it is allowed */
3227 if (!pmu->elpg_enable_allow) {
3228 pmu->elpg_stat = PMU_ELPG_STAT_OFF_ON_PENDING;
3229 goto exit_unlock;
3230 }
3231
3232 ret = gk20a_pmu_enable_elpg_locked(g); 3222 ret = gk20a_pmu_enable_elpg_locked(g);
3233 3223
3234exit_unlock: 3224exit_unlock:
@@ -3238,30 +3228,7 @@ exit:
3238 return ret; 3228 return ret;
3239} 3229}
3240 3230
3241static void pmu_elpg_enable_allow(struct work_struct *work) 3231int gk20a_pmu_disable_elpg(struct gk20a *g)
3242{
3243 struct pmu_gk20a *pmu = container_of(to_delayed_work(work),
3244 struct pmu_gk20a, elpg_enable);
3245
3246 gk20a_dbg_fn("");
3247
3248 mutex_lock(&pmu->elpg_mutex);
3249
3250 /* It is ok to enabled powergating now */
3251 pmu->elpg_enable_allow = true;
3252
3253 /* do we have pending requests? */
3254 if (pmu->elpg_stat == PMU_ELPG_STAT_OFF_ON_PENDING) {
3255 pmu->elpg_stat = PMU_ELPG_STAT_OFF;
3256 gk20a_pmu_enable_elpg_locked(pmu->g);
3257 }
3258
3259 mutex_unlock(&pmu->elpg_mutex);
3260
3261 gk20a_dbg_fn("done");
3262}
3263
3264static int gk20a_pmu_disable_elpg_defer_enable(struct gk20a *g, bool enable)
3265{ 3232{
3266 struct pmu_gk20a *pmu = &g->pmu; 3233 struct pmu_gk20a *pmu = &g->pmu;
3267 struct pmu_cmd cmd; 3234 struct pmu_cmd cmd;
@@ -3273,9 +3240,6 @@ static int gk20a_pmu_disable_elpg_defer_enable(struct gk20a *g, bool enable)
3273 if (!pmu->elpg_ready || !pmu->initialized) 3240 if (!pmu->elpg_ready || !pmu->initialized)
3274 return 0; 3241 return 0;
3275 3242
3276 /* remove the work from queue */
3277 cancel_delayed_work_sync(&pmu->elpg_enable);
3278
3279 mutex_lock(&pmu->elpg_mutex); 3243 mutex_lock(&pmu->elpg_mutex);
3280 3244
3281 pmu->elpg_refcnt--; 3245 pmu->elpg_refcnt--;
@@ -3341,25 +3305,12 @@ static int gk20a_pmu_disable_elpg_defer_enable(struct gk20a *g, bool enable)
3341 } 3305 }
3342 3306
3343exit_reschedule: 3307exit_reschedule:
3344 if (enable) {
3345 pmu->elpg_enable_allow = false;
3346 schedule_delayed_work(&pmu->elpg_enable,
3347 msecs_to_jiffies(PMU_ELPG_ENABLE_ALLOW_DELAY_MSEC));
3348 } else
3349 pmu->elpg_enable_allow = true;
3350
3351
3352exit_unlock: 3308exit_unlock:
3353 mutex_unlock(&pmu->elpg_mutex); 3309 mutex_unlock(&pmu->elpg_mutex);
3354 gk20a_dbg_fn("done"); 3310 gk20a_dbg_fn("done");
3355 return ret; 3311 return ret;
3356} 3312}
3357 3313
3358int gk20a_pmu_disable_elpg(struct gk20a *g)
3359{
3360 return gk20a_pmu_disable_elpg_defer_enable(g, true);
3361}
3362
3363int gk20a_pmu_perfmon_enable(struct gk20a *g, bool enable) 3314int gk20a_pmu_perfmon_enable(struct gk20a *g, bool enable)
3364{ 3315{
3365 struct pmu_gk20a *pmu = &g->pmu; 3316 struct pmu_gk20a *pmu = &g->pmu;
@@ -3386,13 +3337,12 @@ int gk20a_pmu_destroy(struct gk20a *g)
3386 return 0; 3337 return 0;
3387 3338
3388 /* make sure the pending operations are finished before we continue */ 3339 /* make sure the pending operations are finished before we continue */
3389 cancel_delayed_work_sync(&pmu->elpg_enable);
3390 cancel_work_sync(&pmu->pg_init); 3340 cancel_work_sync(&pmu->pg_init);
3391 3341
3392 gk20a_pmu_get_elpg_residency_gating(g, &elpg_ingating_time, 3342 gk20a_pmu_get_elpg_residency_gating(g, &elpg_ingating_time,
3393 &elpg_ungating_time, &gating_cnt); 3343 &elpg_ungating_time, &gating_cnt);
3394 3344
3395 gk20a_pmu_disable_elpg_defer_enable(g, false); 3345 gk20a_pmu_disable_elpg(g);
3396 pmu->initialized = false; 3346 pmu->initialized = false;
3397 3347
3398 /* update the s/w ELPG residency counters */ 3348 /* update the s/w ELPG residency counters */
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index e7a839d4..73a09db6 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -1026,9 +1026,7 @@ struct pmu_gk20a {
1026 wait_queue_head_t pg_wq; 1026 wait_queue_head_t pg_wq;
1027 1027
1028#define PMU_ELPG_ENABLE_ALLOW_DELAY_MSEC 1 /* msec */ 1028#define PMU_ELPG_ENABLE_ALLOW_DELAY_MSEC 1 /* msec */
1029 struct delayed_work elpg_enable; /* deferred elpg enable */
1030 struct work_struct pg_init; 1029 struct work_struct pg_init;
1031 bool elpg_enable_allow; /* true after init, false after disable, true after delay */
1032 struct mutex elpg_mutex; /* protect elpg enable/disable */ 1030 struct mutex elpg_mutex; /* protect elpg enable/disable */
1033 int elpg_refcnt; /* disable -1, enable +1, <=0 elpg disabled, > 0 elpg enabled */ 1031 int elpg_refcnt; /* disable -1, enable +1, <=0 elpg disabled, > 0 elpg enabled */
1034 1032