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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-06-28 13:30:04 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-03 06:16:39 -0400
commitd2486cf1b1d0b0e3306ba6eb0a8b6573fa27d03e (patch)
tree3d83a57a56e27ba2cc3d6afd4063eadf1e2be495 /drivers/gpu/nvgpu
parentb61a3951065ba6fa57b492c563c1681136bf69bf (diff)
gpu: nvgpu: PMU IMEM/DMEM scrubbing cleanup
PMU IMEM/DMEM scrubbing completion check is part of PMU reset, so removing explicit IMEM/DMEM scrubbing check NVGPU JIRA-99 Change-Id: I4553701fd8c08217e109ef3a5fe1e33e372c26d4 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master/r/1510202 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r--drivers/gpu/nvgpu/gm206/bios_gm206.c38
1 files changed, 2 insertions, 36 deletions
diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.c b/drivers/gpu/nvgpu/gm206/bios_gm206.c
index 3002c9c7..216fd594 100644
--- a/drivers/gpu/nvgpu/gm206/bios_gm206.c
+++ b/drivers/gpu/nvgpu/gm206/bios_gm206.c
@@ -105,25 +105,8 @@ static int gm206_bios_devinit(struct gk20a *g)
105 struct nvgpu_timeout timeout; 105 struct nvgpu_timeout timeout;
106 106
107 gk20a_dbg_fn(""); 107 gk20a_dbg_fn("");
108 nvgpu_flcn_reset(g->pmu.flcn);
109 108
110 nvgpu_timeout_init(g, &timeout, 109 if (nvgpu_flcn_reset(g->pmu.flcn)) {
111 PMU_BOOT_TIMEOUT_MAX /
112 PMU_BOOT_TIMEOUT_DEFAULT,
113 NVGPU_TIMER_RETRY_TIMER);
114 do {
115 u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) &
116 (pwr_falcon_dmactl_dmem_scrubbing_m() |
117 pwr_falcon_dmactl_imem_scrubbing_m());
118
119 if (!w) {
120 gk20a_dbg_fn("done");
121 break;
122 }
123 nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT);
124 } while (!nvgpu_timeout_expired(&timeout));
125
126 if (nvgpu_timeout_peek_expired(&timeout)) {
127 err = -ETIMEDOUT; 110 err = -ETIMEDOUT;
128 goto out; 111 goto out;
129 } 112 }
@@ -187,25 +170,8 @@ static int gm206_bios_preos(struct gk20a *g)
187 struct nvgpu_timeout timeout; 170 struct nvgpu_timeout timeout;
188 171
189 gk20a_dbg_fn(""); 172 gk20a_dbg_fn("");
190 nvgpu_flcn_reset(g->pmu.flcn);
191 173
192 nvgpu_timeout_init(g, &timeout, 174 if (nvgpu_flcn_reset(g->pmu.flcn)) {
193 PMU_BOOT_TIMEOUT_MAX /
194 PMU_BOOT_TIMEOUT_DEFAULT,
195 NVGPU_TIMER_RETRY_TIMER);
196 do {
197 u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) &
198 (pwr_falcon_dmactl_dmem_scrubbing_m() |
199 pwr_falcon_dmactl_imem_scrubbing_m());
200
201 if (!w) {
202 gk20a_dbg_fn("done");
203 break;
204 }
205 nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT);
206 } while (!nvgpu_timeout_expired(&timeout));
207
208 if (nvgpu_timeout_peek_expired(&timeout)) {
209 err = -ETIMEDOUT; 175 err = -ETIMEDOUT;
210 goto out; 176 goto out;
211 } 177 }