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authorseshendra Gadagottu <sgadagottu@nvidia.com>2017-10-23 13:20:12 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-25 14:23:24 -0400
commitc6ccb5f2a1e9a8999436f6c28ed5c416c5418ae3 (patch)
treedc1b7459c0a6c6d46ef2b0b3bd345c4522ae7e1e /drivers/gpu/nvgpu
parent0899e11d4bb630381607a0c245f72476e2e9209e (diff)
gpu: nvgpu: gv11b: use scg perf for smid numbering
For SCG to work, smid numbering needs to be done based on scg performance of tpcs. For gv11b and gv11b vgpu, reuse gv100 function "gr_gv100_init_sm_id_table" to do this. Used local variable "index" to avoid multiple computations in the function: gr_gv100_init_sm_id_table index = sm_id + sm Add deug info for printing initialized gpc/tpc/sm/global_tpc indexs. Bug 1842197 Change-Id: Ibf10f47f10a8ca58b86c307a22e159b2cc0d0f43 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1583916 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r--drivers/gpu/nvgpu/gv100/gr_gv100.c19
-rw-r--r--drivers/gpu/nvgpu/gv11b/gr_gv11b.c27
-rw-r--r--drivers/gpu/nvgpu/gv11b/gr_gv11b.h1
-rw-r--r--drivers/gpu/nvgpu/gv11b/hal_gv11b.c4
-rw-r--r--drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c4
5 files changed, 19 insertions, 36 deletions
diff --git a/drivers/gpu/nvgpu/gv100/gr_gv100.c b/drivers/gpu/nvgpu/gv100/gr_gv100.c
index 4b2038ba..8a4b88b4 100644
--- a/drivers/gpu/nvgpu/gv100/gr_gv100.c
+++ b/drivers/gpu/nvgpu/gv100/gr_gv100.c
@@ -251,12 +251,19 @@ void gr_gv100_init_sm_id_table(struct gk20a *g)
251 251
252 for (tpc = 0, sm_id = 0; sm_id < num_sm; tpc++, sm_id += sm_per_tpc) { 252 for (tpc = 0, sm_id = 0; sm_id < num_sm; tpc++, sm_id += sm_per_tpc) {
253 for (sm = 0; sm < sm_per_tpc; sm++) { 253 for (sm = 0; sm < sm_per_tpc; sm++) {
254 g->gr.sm_to_cluster[sm_id + sm].gpc_index = 254 u32 index = sm_id + sm;
255 gpc_table[tpc]; 255
256 g->gr.sm_to_cluster[sm_id + sm].tpc_index = 256 g->gr.sm_to_cluster[index].gpc_index = gpc_table[tpc];
257 tpc_table[tpc]; 257 g->gr.sm_to_cluster[index].tpc_index = tpc_table[tpc];
258 g->gr.sm_to_cluster[sm_id + sm].sm_index = sm; 258 g->gr.sm_to_cluster[index].sm_index = sm;
259 g->gr.sm_to_cluster[sm_id + sm].global_tpc_index = tpc; 259 g->gr.sm_to_cluster[index].global_tpc_index = tpc;
260 nvgpu_log_info(g,
261 "gpc : %d tpc %d sm_index %d global_index: %d",
262 g->gr.sm_to_cluster[index].gpc_index,
263 g->gr.sm_to_cluster[index].tpc_index,
264 g->gr.sm_to_cluster[index].sm_index,
265 g->gr.sm_to_cluster[index].global_tpc_index);
266
260 } 267 }
261 } 268 }
262 269
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index 154088d6..fc894908 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -2125,33 +2125,6 @@ void gr_gv11b_detect_sm_arch(struct gk20a *g)
2125 gr_gpc0_tpc0_sm_arch_warp_count_v(v); 2125 gr_gpc0_tpc0_sm_arch_warp_count_v(v);
2126} 2126}
2127 2127
2128void gr_gv11b_init_sm_id_table(struct gk20a *g)
2129{
2130 u32 gpc, tpc, sm;
2131 u32 sm_id = 0;
2132 u32 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC);
2133
2134 /* TODO populate smids based on power efficiency */
2135 for (tpc = 0; tpc < g->gr.max_tpc_per_gpc_count; tpc++) {
2136 for (gpc = 0; gpc < g->gr.gpc_count; gpc++) {
2137
2138 if (tpc >= g->gr.gpc_tpc_count[gpc])
2139 continue;
2140
2141 for (sm = 0; sm < sm_per_tpc; sm++) {
2142 g->gr.sm_to_cluster[sm_id].tpc_index = tpc;
2143 g->gr.sm_to_cluster[sm_id].gpc_index = gpc;
2144 g->gr.sm_to_cluster[sm_id].sm_index = sm_id % 2;
2145 g->gr.sm_to_cluster[sm_id].global_tpc_index =
2146 tpc;
2147 sm_id++;
2148 }
2149 }
2150 }
2151 g->gr.no_of_sm = sm_id;
2152 nvgpu_log_info(g, " total number of sm = %d", g->gr.no_of_sm);
2153}
2154
2155void gr_gv11b_program_sm_id_numbering(struct gk20a *g, 2128void gr_gv11b_program_sm_id_numbering(struct gk20a *g,
2156 u32 gpc, u32 tpc, u32 smid) 2129 u32 gpc, u32 tpc, u32 smid)
2157{ 2130{
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
index ed469abd..e469d142 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
@@ -138,7 +138,6 @@ int gr_gv11b_handle_fecs_error(struct gk20a *g,
138int gr_gv11b_setup_rop_mapping(struct gk20a *g, struct gr_gk20a *gr); 138int gr_gv11b_setup_rop_mapping(struct gk20a *g, struct gr_gk20a *gr);
139int gr_gv11b_init_sw_veid_bundle(struct gk20a *g); 139int gr_gv11b_init_sw_veid_bundle(struct gk20a *g);
140void gr_gv11b_detect_sm_arch(struct gk20a *g); 140void gr_gv11b_detect_sm_arch(struct gk20a *g);
141void gr_gv11b_init_sm_id_table(struct gk20a *g);
142void gr_gv11b_program_sm_id_numbering(struct gk20a *g, 141void gr_gv11b_program_sm_id_numbering(struct gk20a *g,
143 u32 gpc, u32 tpc, u32 smid); 142 u32 gpc, u32 tpc, u32 smid);
144int gr_gv11b_load_smid_config(struct gk20a *g); 143int gr_gv11b_load_smid_config(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index 46323cf9..8e4cdab8 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -66,6 +66,8 @@
66#include "gp106/pmu_gp106.h" 66#include "gp106/pmu_gp106.h"
67#include "gp106/acr_gp106.h" 67#include "gp106/acr_gp106.h"
68 68
69#include "gv100/gr_gv100.h"
70
69#include "dbg_gpu_gv11b.h" 71#include "dbg_gpu_gv11b.h"
70#include "hal_gv11b.h" 72#include "hal_gv11b.h"
71#include "css_gr_gv11b.h" 73#include "css_gr_gv11b.h"
@@ -298,7 +300,7 @@ static const struct gpu_ops gv11b_ops = {
298 .resume_contexts = gr_gk20a_resume_contexts, 300 .resume_contexts = gr_gk20a_resume_contexts,
299 .get_preemption_mode_flags = gr_gp10b_get_preemption_mode_flags, 301 .get_preemption_mode_flags = gr_gp10b_get_preemption_mode_flags,
300 .fuse_override = gp10b_gr_fuse_override, 302 .fuse_override = gp10b_gr_fuse_override,
301 .init_sm_id_table = gr_gv11b_init_sm_id_table, 303 .init_sm_id_table = gr_gv100_init_sm_id_table,
302 .load_smid_config = gr_gv11b_load_smid_config, 304 .load_smid_config = gr_gv11b_load_smid_config,
303 .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, 305 .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering,
304 .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, 306 .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr,
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
index 2cd8018c..7f6df820 100644
--- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -74,6 +74,8 @@
74#include <gv11b/ltc_gv11b.h> 74#include <gv11b/ltc_gv11b.h>
75#include <gv11b/gv11b_gating_reglist.h> 75#include <gv11b/gv11b_gating_reglist.h>
76 76
77#include <gv100/gr_gv100.h>
78
77#include <nvgpu/enabled.h> 79#include <nvgpu/enabled.h>
78 80
79#include "vgpu_gr_gv11b.h" 81#include "vgpu_gr_gv11b.h"
@@ -180,7 +182,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
180 .resume_contexts = vgpu_gr_resume_contexts, 182 .resume_contexts = vgpu_gr_resume_contexts,
181 .get_preemption_mode_flags = gr_gp10b_get_preemption_mode_flags, 183 .get_preemption_mode_flags = gr_gp10b_get_preemption_mode_flags,
182 .fuse_override = gp10b_gr_fuse_override, 184 .fuse_override = gp10b_gr_fuse_override,
183 .init_sm_id_table = gr_gv11b_init_sm_id_table, 185 .init_sm_id_table = gr_gv100_init_sm_id_table,
184 .load_smid_config = gr_gv11b_load_smid_config, 186 .load_smid_config = gr_gv11b_load_smid_config,
185 .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, 187 .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering,
186 .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, 188 .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr,