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authorTerje Bergstrom <tbergstrom@nvidia.com>2014-05-12 08:14:05 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:10:03 -0400
commitbcf8c6411cebde9435b97cb6b575b947205688fa (patch)
treee735d8a85dbf3db36e87b3cd4b68e3bdad4116e7 /drivers/gpu/nvgpu
parent846f0c4f418d8f072876b6c087c6930153bdb0cd (diff)
gpu: nvgpu: Remove extraneous FB flush calls
gk20a_mm_fb_flush() invoked G_ELPG_FLUSH and FB_FLUSH. Remove the invokation of G_ELPG_FLUSH. Replace calls to gk20a_mm_fb_flush() with gk20a_mm_l2_flush() when appropriate. Bug 1421824 Change-Id: I02af4bdc3b7bd26d0f6a8d610f70349269775a36 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/408210 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c12
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.c2
2 files changed, 4 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 6a41509b..df85d852 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -655,8 +655,6 @@ static int gr_gk20a_commit_inst(struct channel_gk20a *c, u64 gpu_va)
655 655
656 gk20a_dbg_fn(""); 656 gk20a_dbg_fn("");
657 657
658 gk20a_mm_fb_flush(c->g);
659
660 inst_ptr = c->inst_block.cpuva; 658 inst_ptr = c->inst_block.cpuva;
661 if (!inst_ptr) 659 if (!inst_ptr)
662 return -ENOMEM; 660 return -ENOMEM;
@@ -1573,7 +1571,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
1573 ctx_header_words = roundup(ctx_header_bytes, sizeof(u32)); 1571 ctx_header_words = roundup(ctx_header_bytes, sizeof(u32));
1574 ctx_header_words >>= 2; 1572 ctx_header_words >>= 2;
1575 1573
1576 gk20a_mm_fb_flush(g); 1574 gk20a_mm_l2_flush(g, true);
1577 1575
1578 for (i = 0; i < ctx_header_words; i++) { 1576 for (i = 0; i < ctx_header_words; i++) {
1579 data = gk20a_mem_rd32(ctx_ptr, i); 1577 data = gk20a_mem_rd32(ctx_ptr, i);
@@ -1634,11 +1632,9 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g,
1634 void *ctx_ptr = NULL; 1632 void *ctx_ptr = NULL;
1635 u32 data; 1633 u32 data;
1636 1634
1637 /*XXX caller responsible for making sure the channel is quiesced? */
1638
1639 /* Channel gr_ctx buffer is gpu cacheable. 1635 /* Channel gr_ctx buffer is gpu cacheable.
1640 Flush and invalidate before cpu update. */ 1636 Flush and invalidate before cpu update. */
1641 gk20a_mm_fb_flush(g); 1637 gk20a_mm_l2_flush(g, true);
1642 1638
1643 ctx_ptr = vmap(ch_ctx->gr_ctx.pages, 1639 ctx_ptr = vmap(ch_ctx->gr_ctx.pages,
1644 PAGE_ALIGN(ch_ctx->gr_ctx.size) >> PAGE_SHIFT, 1640 PAGE_ALIGN(ch_ctx->gr_ctx.size) >> PAGE_SHIFT,
@@ -1678,7 +1674,7 @@ static int gr_gk20a_load_golden_ctx_image(struct gk20a *g,
1678 1674
1679 /* Channel gr_ctx buffer is gpu cacheable. 1675 /* Channel gr_ctx buffer is gpu cacheable.
1680 Flush and invalidate before cpu update. */ 1676 Flush and invalidate before cpu update. */
1681 gk20a_mm_fb_flush(g); 1677 gk20a_mm_l2_flush(g, true);
1682 1678
1683 ctx_ptr = vmap(ch_ctx->gr_ctx.pages, 1679 ctx_ptr = vmap(ch_ctx->gr_ctx.pages,
1684 PAGE_ALIGN(ch_ctx->gr_ctx.size) >> PAGE_SHIFT, 1680 PAGE_ALIGN(ch_ctx->gr_ctx.size) >> PAGE_SHIFT,
@@ -6686,7 +6682,7 @@ int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
6686 goto cleanup; 6682 goto cleanup;
6687 } 6683 }
6688 6684
6689 gk20a_mm_fb_flush(g); 6685 gk20a_mm_l2_flush(g, true);
6690 6686
6691 /* write to appropriate place in context image, 6687 /* write to appropriate place in context image,
6692 * first have to figure out where that really is */ 6688 * first have to figure out where that really is */
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index dd492d92..3b0b020d 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -2801,8 +2801,6 @@ int gk20a_mm_fb_flush(struct gk20a *g)
2801 2801
2802 mutex_lock(&mm->l2_op_lock); 2802 mutex_lock(&mm->l2_op_lock);
2803 2803
2804 g->ops.ltc.elpg_flush(g);
2805
2806 /* Make sure all previous writes are committed to the L2. There's no 2804 /* Make sure all previous writes are committed to the L2. There's no
2807 guarantee that writes are to DRAM. This will be a sysmembar internal 2805 guarantee that writes are to DRAM. This will be a sysmembar internal
2808 to the L2. */ 2806 to the L2. */