diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-10-13 11:12:58 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-17 12:25:17 -0400 |
commit | 99cae3dff71433c21f85bb7f03e42050db8a33dc (patch) | |
tree | a2d8d02b678cb9af3fca9d61dfe126372d9be86a /drivers/gpu/nvgpu | |
parent | e78cd6c42aec3ae18f12420fd8eb4cb58d09da2d (diff) |
gpu: nvgpu: gv11b: Use internal nvgpu_warpstate
Replace use of ioctl structure warpstate with internal
nvgpu_warptate.
JIRA NVGPU-259
Change-Id: I003c15152042e566124c04d6124e515e36157c88
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578683
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index da683af6..aac6cba3 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -2504,7 +2504,7 @@ int gv11b_gr_sm_trigger_suspend(struct gk20a *g) | |||
2504 | return 0; | 2504 | return 0; |
2505 | } | 2505 | } |
2506 | 2506 | ||
2507 | void gv11b_gr_bpt_reg_info(struct gk20a *g, struct warpstate *w_state) | 2507 | void gv11b_gr_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state) |
2508 | { | 2508 | { |
2509 | /* Check if we have at least one valid warp | 2509 | /* Check if we have at least one valid warp |
2510 | * get paused state on maxwell | 2510 | * get paused state on maxwell |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index 3f06fe77..dbaee5a7 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h | |||
@@ -44,6 +44,7 @@ struct gk20a; | |||
44 | struct zbc_entry; | 44 | struct zbc_entry; |
45 | struct zbc_query_params; | 45 | struct zbc_query_params; |
46 | struct channel_ctx_gk20a; | 46 | struct channel_ctx_gk20a; |
47 | struct nvgpu_warpstate; | ||
47 | 48 | ||
48 | enum { | 49 | enum { |
49 | VOLTA_CHANNEL_GPFIFO_A = 0xC36F, | 50 | VOLTA_CHANNEL_GPFIFO_A = 0xC36F, |
@@ -158,7 +159,7 @@ int gr_gv11b_init_fs_state(struct gk20a *g); | |||
158 | void gv11b_gr_get_esr_sm_sel(struct gk20a *g, u32 gpc, u32 tpc, | 159 | void gv11b_gr_get_esr_sm_sel(struct gk20a *g, u32 gpc, u32 tpc, |
159 | u32 *esr_sm_sel); | 160 | u32 *esr_sm_sel); |
160 | int gv11b_gr_sm_trigger_suspend(struct gk20a *g); | 161 | int gv11b_gr_sm_trigger_suspend(struct gk20a *g); |
161 | void gv11b_gr_bpt_reg_info(struct gk20a *g, struct warpstate *w_state); | 162 | void gv11b_gr_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state); |
162 | int gv11b_gr_update_sm_error_state(struct gk20a *g, | 163 | int gv11b_gr_update_sm_error_state(struct gk20a *g, |
163 | struct channel_gk20a *ch, u32 sm_id, | 164 | struct channel_gk20a *ch, u32 sm_id, |
164 | struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_state); | 165 | struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_state); |