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authorRichard Zhao <rizhao@nvidia.com>2018-03-20 18:33:56 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-03-29 21:54:55 -0400
commit8673813634ed3095cba228dd0ee5f1e49ac325ee (patch)
tree29ce5f56550a6f6742c6bbbe230f2af920b6c397 /drivers/gpu/nvgpu
parent717d99fcfab99e478499880d5742091d031fc76b (diff)
gpu: nvgpu: vgpu: add TEGRA_VGPU_EVENT_CHANNEL_CLEANUP
RM server uses the command to notify clients to abort and clean up a channel. Clients will set has_timedout at the same time. Jira VQRM-3058 Change-Id: Iebd28ccdae52dd789ee93d65c4e816b83df8d891 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1679710 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h6
-rw-r--r--drivers/gpu/nvgpu/vgpu/vgpu.c12
2 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
index 3bcabadf..43a6d079 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
@@ -710,6 +710,10 @@ struct tegra_vgpu_semaphore_wakeup {
710 u32 post_events; 710 u32 post_events;
711}; 711};
712 712
713struct tegra_vgpu_channel_cleanup {
714 u32 chid;
715};
716
713enum { 717enum {
714 718
715 TEGRA_VGPU_INTR_GR = 0, 719 TEGRA_VGPU_INTR_GR = 0,
@@ -727,6 +731,7 @@ enum {
727 TEGRA_VGPU_EVENT_CHANNEL = 3, 731 TEGRA_VGPU_EVENT_CHANNEL = 3,
728 TEGRA_VGPU_EVENT_SM_ESR = 4, 732 TEGRA_VGPU_EVENT_SM_ESR = 4,
729 TEGRA_VGPU_EVENT_SEMAPHORE_WAKEUP = 5, 733 TEGRA_VGPU_EVENT_SEMAPHORE_WAKEUP = 5,
734 TEGRA_VGPU_EVENT_CHANNEL_CLEANUP = 6,
730}; 735};
731 736
732struct tegra_vgpu_intr_msg { 737struct tegra_vgpu_intr_msg {
@@ -742,6 +747,7 @@ struct tegra_vgpu_intr_msg {
742 struct tegra_vgpu_channel_event_info channel_event; 747 struct tegra_vgpu_channel_event_info channel_event;
743 struct tegra_vgpu_sm_esr_info sm_esr; 748 struct tegra_vgpu_sm_esr_info sm_esr;
744 struct tegra_vgpu_semaphore_wakeup sem_wakeup; 749 struct tegra_vgpu_semaphore_wakeup sem_wakeup;
750 struct tegra_vgpu_channel_cleanup ch_cleanup;
745 char padding[32]; 751 char padding[32];
746 } info; 752 } info;
747}; 753};
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c
index 3b53474d..08556ee5 100644
--- a/drivers/gpu/nvgpu/vgpu/vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/vgpu.c
@@ -114,6 +114,14 @@ static void vgpu_handle_channel_event(struct gk20a *g,
114 gk20a_tsg_event_id_post_event(tsg, info->event_id); 114 gk20a_tsg_event_id_post_event(tsg, info->event_id);
115} 115}
116 116
117static void vgpu_channel_abort_cleanup(struct gk20a *g, u32 chid)
118{
119 struct channel_gk20a *ch = &g->fifo.channel[chid];
120
121 ch->has_timedout = true;
122 g->ops.fifo.ch_abort_clean_up(ch);
123}
124
117int vgpu_intr_thread(void *dev_id) 125int vgpu_intr_thread(void *dev_id)
118{ 126{
119 struct gk20a *g = dev_id; 127 struct gk20a *g = dev_id;
@@ -169,6 +177,10 @@ int vgpu_intr_thread(void *dev_id)
169 g->ops.semaphore_wakeup(g, 177 g->ops.semaphore_wakeup(g,
170 !!msg->info.sem_wakeup.post_events); 178 !!msg->info.sem_wakeup.post_events);
171 break; 179 break;
180 case TEGRA_VGPU_EVENT_CHANNEL_CLEANUP:
181 vgpu_channel_abort_cleanup(g,
182 msg->info.ch_cleanup.chid);
183 break;
172 default: 184 default:
173 nvgpu_err(g, "unknown event %u", msg->event); 185 nvgpu_err(g, "unknown event %u", msg->event);
174 break; 186 break;