diff options
author | Aingara Paramakuru <aparamakuru@nvidia.com> | 2016-03-08 09:54:38 -0500 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-03-24 12:00:15 -0400 |
commit | 845a693d13ad4399cd85d795324dc0eb9586784e (patch) | |
tree | 02d6cae11fcd1d3f6f54b17ed1e20ced178c3217 /drivers/gpu/nvgpu | |
parent | 7d45a7361d104674d921dffed0f7051b0aaf1059 (diff) |
gpu: nvgpu: vgpu: add channel timeslice support
Update vgpu back-end to send channel timeslice request
to server.
JIRA VFND-1347
Bug 1729664
Change-Id: I289f88882780616331952a79a223755117f07174
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1028977
(cherry picked from commit 792a5642b37ca34362ba68200cb8909d2fe8c18c)
Reviewed-on: http://git-master/r/1026592
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index a7e9eed8..e636d5ae 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -570,6 +570,25 @@ static int vgpu_fifo_set_runlist_interleave(struct gk20a *g, | |||
570 | return err ? err : msg.ret; | 570 | return err ? err : msg.ret; |
571 | } | 571 | } |
572 | 572 | ||
573 | int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice) | ||
574 | { | ||
575 | struct gk20a_platform *platform = gk20a_get_platform(ch->g->dev); | ||
576 | struct tegra_vgpu_cmd_msg msg; | ||
577 | struct tegra_vgpu_channel_timeslice_params *p = | ||
578 | &msg.params.channel_timeslice; | ||
579 | int err; | ||
580 | |||
581 | gk20a_dbg_fn(""); | ||
582 | |||
583 | msg.cmd = TEGRA_VGPU_CMD_CHANNEL_SET_TIMESLICE; | ||
584 | msg.handle = platform->virt_handle; | ||
585 | p->handle = ch->virt_ctx; | ||
586 | p->timeslice_us = timeslice; | ||
587 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
588 | WARN_ON(err || msg.ret); | ||
589 | return err ? err : msg.ret; | ||
590 | } | ||
591 | |||
573 | static void vgpu_fifo_set_ctx_mmu_error(struct gk20a *g, | 592 | static void vgpu_fifo_set_ctx_mmu_error(struct gk20a *g, |
574 | struct channel_gk20a *ch) | 593 | struct channel_gk20a *ch) |
575 | { | 594 | { |
@@ -656,4 +675,5 @@ void vgpu_init_fifo_ops(struct gpu_ops *gops) | |||
656 | gops->fifo.wait_engine_idle = vgpu_fifo_wait_engine_idle; | 675 | gops->fifo.wait_engine_idle = vgpu_fifo_wait_engine_idle; |
657 | gops->fifo.channel_set_priority = vgpu_channel_set_priority; | 676 | gops->fifo.channel_set_priority = vgpu_channel_set_priority; |
658 | gops->fifo.set_runlist_interleave = vgpu_fifo_set_runlist_interleave; | 677 | gops->fifo.set_runlist_interleave = vgpu_fifo_set_runlist_interleave; |
678 | gops->fifo.channel_set_timeslice = vgpu_channel_set_timeslice; | ||
659 | } | 679 | } |