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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-12-06 17:22:52 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-12-12 17:03:57 -0500
commit6e3f9112eaf351276b10391f020d203d87314172 (patch)
tree535f026043366262fa45d2dc202412f287cbec07 /drivers/gpu/nvgpu
parent3cb9cd5267074b42b7ecd7e1c21c61b2589b4932 (diff)
gpu: nvgpu: Disallow use of bare channels
All channels need to now be wrapped in TSGs. Disallow use of bare channels by preventing creation of GPFIFO for them. Bug 1842197 Change-Id: Id0ebee4c590804b96c09f8951e35ba2680b596e7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612697 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r--drivers/gpu/nvgpu/common/linux/cde.c3
-rw-r--r--drivers/gpu/nvgpu/gk20a/ce2_gk20a.c3
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c6
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.h1
4 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/cde.c b/drivers/gpu/nvgpu/common/linux/cde.c
index b48c498d..f6b43113 100644
--- a/drivers/gpu/nvgpu/common/linux/cde.c
+++ b/drivers/gpu/nvgpu/common/linux/cde.c
@@ -1294,7 +1294,8 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
1294 } 1294 }
1295 1295
1296 /* allocate gpfifo (1024 should be more than enough) */ 1296 /* allocate gpfifo (1024 should be more than enough) */
1297 err = gk20a_channel_alloc_gpfifo(ch, 1024, 0, 0); 1297 err = gk20a_channel_alloc_gpfifo(ch, 1024, 0,
1298 NVGPU_GPFIFO_FLAGS_ALLOW_BARE_CHANNEL);
1298 if (err) { 1299 if (err) {
1299 nvgpu_warn(g, "cde: unable to allocate gpfifo"); 1300 nvgpu_warn(g, "cde: unable to allocate gpfifo");
1300 goto err_alloc_gpfifo; 1301 goto err_alloc_gpfifo;
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
index 99c518b5..67264f40 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
@@ -490,7 +490,8 @@ u32 gk20a_ce_create_context(struct gk20a *g,
490 } 490 }
491 491
492 /* allocate gpfifo (1024 should be more than enough) */ 492 /* allocate gpfifo (1024 should be more than enough) */
493 err = gk20a_channel_alloc_gpfifo(ce_ctx->ch, 1024, 0, 0); 493 err = gk20a_channel_alloc_gpfifo(ce_ctx->ch, 1024, 0,
494 NVGPU_GPFIFO_FLAGS_ALLOW_BARE_CHANNEL);
494 if (err) { 495 if (err) {
495 nvgpu_err(g, "ce: unable to allocate gpfifo"); 496 nvgpu_err(g, "ce: unable to allocate gpfifo");
496 goto end; 497 goto end;
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index e10be3c9..ee78d0b1 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -1134,6 +1134,12 @@ int gk20a_channel_alloc_gpfifo(struct channel_gk20a *c,
1134 gpfifo_size = num_entries; 1134 gpfifo_size = num_entries;
1135 gpfifo_entry_size = nvgpu_get_gpfifo_entry_size(); 1135 gpfifo_entry_size = nvgpu_get_gpfifo_entry_size();
1136 1136
1137 if (!(flags & NVGPU_GPFIFO_FLAGS_ALLOW_BARE_CHANNEL) &&
1138 !gk20a_is_channel_marked_as_tsg(c)) {
1139 nvgpu_err(g, "channel not part of a TSG");
1140 return -EINVAL;
1141 }
1142
1137 if (flags & NVGPU_GPFIFO_FLAGS_SUPPORT_VPR) 1143 if (flags & NVGPU_GPFIFO_FLAGS_SUPPORT_VPR)
1138 c->vpr = true; 1144 c->vpr = true;
1139 1145
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index e6f73cf6..21ebeb9f 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -49,6 +49,7 @@ struct fifo_profile_gk20a;
49#define NVGPU_GPFIFO_FLAGS_SUPPORT_VPR (1 << 0) 49#define NVGPU_GPFIFO_FLAGS_SUPPORT_VPR (1 << 0)
50#define NVGPU_GPFIFO_FLAGS_SUPPORT_DETERMINISTIC (1 << 1) 50#define NVGPU_GPFIFO_FLAGS_SUPPORT_DETERMINISTIC (1 << 1)
51#define NVGPU_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE (1 << 2) 51#define NVGPU_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE (1 << 2)
52#define NVGPU_GPFIFO_FLAGS_ALLOW_BARE_CHANNEL (1 << 3)
52 53
53/* Flags to be passed to g->ops.gr.alloc_obj_ctx() */ 54/* Flags to be passed to g->ops.gr.alloc_obj_ctx() */
54#define NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP (1 << 1) 55#define NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP (1 << 1)