gpu: nvgpu: remove coherence support from gp10b

We do not support coherence for gp10b, hence clean up related code
Remove API gp10b_mm_phys_addr_translate() and use physical address
instead

Also, since now gp10b_mm_iova_addr() becomes equivalent to
gk20a_mm_iova_addr(), remove gp10b_mm_iova_addr() altogether
We first set gk20a_mm_iova_addr() to get_iova_addr() pointer anyways
so we continue using gk20a version of the API

Jira GPUT19X-17
Bug 1651331
Bug 200283998

Change-Id: Ic1ca198fcde7ddbcd23516bff8a2e65c9eae32b1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1512598
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

2 files changed, 0 insertions, 29 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index 2ff199c6..590dd960 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -124,32 +124,6 @@ static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g)
         return 0;
 }
 
-static u64 gp10b_mm_phys_addr_translate(struct gk20a *g, u64 phys_addr,
-                u32 flags)
-{
-        if (!device_is_iommuable(dev_from_gk20a(g)))
-                if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT)
-                        return phys_addr |
-                                1ULL << NVGPU_MM_GET_IO_COHERENCE_BIT;
-
-        return phys_addr;
-}
-
-static u64 gp10b_mm_iova_addr(struct gk20a *g, struct scatterlist *sgl,
-                u32 flags)
-{
-        if (!device_is_iommuable(dev_from_gk20a(g)))
-                return gp10b_mm_phys_addr_translate(g, sg_phys(sgl), flags);
-
-        if (sg_dma_address(sgl) == 0)
-                return gp10b_mm_phys_addr_translate(g, sg_phys(sgl), flags);
-
-        if (sg_dma_address(sgl) == DMA_ERROR_CODE)
-                return 0;
-
-        return gk20a_mm_smmu_vaddr_translate(g, sg_dma_address(sgl));
-}
-
 static void update_gmmu_pde3_locked(struct vm_gk20a *vm,
                                     const struct gk20a_mmu_level *l,
                                     struct nvgpu_gmmu_pd *pd,
@@ -401,7 +375,6 @@ void gp10b_init_mm(struct gpu_ops *gops)
         gops->mm.init_mm_setup_hw = gp10b_init_mm_setup_hw;
         gops->mm.init_bar2_vm = gb10b_init_bar2_vm;
         gops->mm.init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup;
-        gops->mm.get_iova_addr = gp10b_mm_iova_addr;
         gops->mm.get_mmu_levels = gp10b_mm_get_mmu_levels;
         gops->mm.init_pdb = gp10b_mm_init_pdb;
         gops->mm.remove_bar2_vm = gp10b_remove_bar2_vm;
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
index 034944e0..4cc71ea6 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
@@ -14,8 +14,6 @@
 #ifndef MM_GP10B_H
 #define MM_GP10B_H
 
-#define NVGPU_MM_GET_IO_COHERENCE_BIT   35
-
 struct gpu_ops;
 
 void gp10b_init_mm(struct gpu_ops *gops);