gpu: nvgpu: enable/disable tegra fuse clock

GPU hardware block needs tegra fuse clock to mirror
gpu fuses from tegra fuses to gpu domain.
Tegra fuse driver provided following APIs to
enable/disable tegra fuse clock:
int tegra_fuse_clock_enable(void);
int tegra_fuse_clock_disable(void);

To ensure that tegra fuse clock is disabled by nvgpu
driver when gpu hardware block is not in use by:
Calling tegra_fuse_clock_enable() while doing
gk20a_pm_unrailgate() and calling
tegra_fuse_clock_disable() while doing
gk20a_pm_railgate().

Bug 2019897

Change-Id: I61688829fd9a8b0c1ffa9d34db6393550f333866
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1595297
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 16 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/module.c b/drivers/gpu/nvgpu/common/linux/module.c
index 6b27c9f1..76b9d4db 100644
--- a/drivers/gpu/nvgpu/common/linux/module.c
+++ b/drivers/gpu/nvgpu/common/linux/module.c
@@ -28,6 +28,8 @@
 #include <dt-bindings/soc/gm20b-fuse.h>
 #include <dt-bindings/soc/gp10b-fuse.h>
 
+#include <soc/tegra/fuse.h>
+
 #include <nvgpu/dma.h>
 #include <nvgpu/kmem.h>
 #include <nvgpu/nvgpu_common.h>
@@ -684,9 +686,8 @@ static int gk20a_pm_railgate(struct device *dev)
 {
         struct gk20a_platform *platform = dev_get_drvdata(dev);
         int ret = 0;
-#ifdef CONFIG_DEBUG_FS
         struct gk20a *g = get_gk20a(dev);
-
+#ifdef CONFIG_DEBUG_FS
         g->pstats.last_rail_gate_start = jiffies;
 
         if (g->pstats.railgating_cycle_count >= 1)
@@ -698,10 +699,17 @@ static int gk20a_pm_railgate(struct device *dev)
 
         if (platform->railgate)
                 ret = platform->railgate(dev);
+        if (ret) {
+                nvgpu_err(g, "failed to railgate platform, err=%d", ret);
+                return ret;
+        }
 
 #ifdef CONFIG_DEBUG_FS
         g->pstats.last_rail_gate_complete = jiffies;
 #endif
+        ret = tegra_fuse_clock_disable();
+        if (ret)
+                nvgpu_err(g, "failed to disable tegra fuse clock, err=%d", ret);
 
         return ret;
 }
@@ -710,9 +718,14 @@ static int gk20a_pm_unrailgate(struct device *dev)
 {
         struct gk20a_platform *platform = dev_get_drvdata(dev);
         int ret = 0;
-#ifdef CONFIG_DEBUG_FS
         struct gk20a *g = get_gk20a(dev);
 
+        ret = tegra_fuse_clock_enable();
+        if (ret) {
+                nvgpu_err(g, "failed to enable tegra fuse clock, err=%d", ret);
+                return ret;
+        }
+#ifdef CONFIG_DEBUG_FS
         g->pstats.last_rail_ungate_start = jiffies;
         if (g->pstats.railgating_cycle_count >= 1)
                 g->pstats.total_rail_gate_time_ms =