gpu: nvgpu: Do not enable L2 bit CYA15

Enabling L2 CYA15 is necessary only in another GPU for enabling
an HW fix. gk20a does not have this problem, so enabling CYA15
is not necessary.

Change-Id: I7318e8541ad392f9a34f3650beac05a39d7bba68
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1146086
Reviewed-by: Ken Adams <kadams@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>

1 files changed, 0 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index e7e6662a..4638d597 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -1294,7 +1294,6 @@ static int gr_gk20a_ctx_state_floorsweep(struct gk20a *g)
         u32 sm_id = 0, gpc_id = 0;
         u32 tpc_per_gpc;
         u32 max_ways_evict = INVALID_MAX_WAYS;
-        u32 l1c_dbg_reg_val;
         u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
         u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE);
 
@@ -1382,11 +1381,6 @@ static int gr_gk20a_ctx_state_floorsweep(struct gk20a *g)
         gk20a_writel(g, gr_bes_crop_settings_r(),
                      gr_bes_crop_settings_num_active_fbps_f(gr->num_fbps));
 
-        /* turn on cya15 bit for a default val that missed the cut */
-        l1c_dbg_reg_val = gk20a_readl(g, gr_gpc0_tpc0_l1c_dbg_r());
-        l1c_dbg_reg_val |= gr_gpc0_tpc0_l1c_dbg_cya15_en_f();
-        gk20a_writel(g, gr_gpc0_tpc0_l1c_dbg_r(), l1c_dbg_reg_val);
-
         return 0;
 }