diff options
author | Alex Waterman <alexw@nvidia.com> | 2017-10-10 15:28:02 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-11 17:40:22 -0400 |
commit | 60b655330a233fd0ea1ab97341e025284d55186f (patch) | |
tree | a9855515961a27a1874f13836344ecc956f78b49 /drivers/gpu/nvgpu | |
parent | c53b94f1dd45384c2234e8c3f712df10395d0601 (diff) |
gpu: nvgpu: Remove SGL reference from mm_gk20a.c
Remove an SGL reference from the mm_gk20a.c code. This code is
common code and as such all linuxisms need to be fixed. It just
so happens that this particular function is only used by the
CDE code which is only present in Linux. So simply move this
function over to the CDE code.
JIRA NVGPU-30
JIRA NVGPU-225
JIRA NVGPU-226
Change-Id: Ifb0cb427c742c6d9cada382ace4a52f52474c379
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576436
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/cde.c | 21 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 1 |
3 files changed, 18 insertions, 19 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/cde.c b/drivers/gpu/nvgpu/common/linux/cde.c index 0c52271a..2832408d 100644 --- a/drivers/gpu/nvgpu/common/linux/cde.c +++ b/drivers/gpu/nvgpu/common/linux/cde.c | |||
@@ -57,6 +57,21 @@ static struct gk20a_cde_ctx *gk20a_cde_allocate_context(struct nvgpu_os_linux *l | |||
57 | #define MAX_CTX_USE_COUNT 42 | 57 | #define MAX_CTX_USE_COUNT 42 |
58 | #define MAX_CTX_RETRY_TIME 2000 | 58 | #define MAX_CTX_RETRY_TIME 2000 |
59 | 59 | ||
60 | static dma_addr_t gpuva_to_iova_base(struct vm_gk20a *vm, u64 gpu_vaddr) | ||
61 | { | ||
62 | struct nvgpu_mapped_buf *buffer; | ||
63 | dma_addr_t addr = 0; | ||
64 | struct gk20a *g = gk20a_from_vm(vm); | ||
65 | |||
66 | nvgpu_mutex_acquire(&vm->update_gmmu_lock); | ||
67 | buffer = __nvgpu_vm_find_mapped_buf(vm, gpu_vaddr); | ||
68 | if (buffer) | ||
69 | addr = nvgpu_mem_get_addr_sgl(g, buffer->sgt->sgl); | ||
70 | nvgpu_mutex_release(&vm->update_gmmu_lock); | ||
71 | |||
72 | return addr; | ||
73 | } | ||
74 | |||
60 | static void gk20a_deinit_cde_img(struct gk20a_cde_ctx *cde_ctx) | 75 | static void gk20a_deinit_cde_img(struct gk20a_cde_ctx *cde_ctx) |
61 | { | 76 | { |
62 | unsigned int i; | 77 | unsigned int i; |
@@ -419,8 +434,8 @@ static int gk20a_cde_patch_params(struct gk20a_cde_ctx *cde_ctx) | |||
419 | new_data = g->gr.compbit_store.mem.size; | 434 | new_data = g->gr.compbit_store.mem.size; |
420 | break; | 435 | break; |
421 | case TYPE_PARAM_SOURCE_SMMU_ADDR: | 436 | case TYPE_PARAM_SOURCE_SMMU_ADDR: |
422 | new_data = gk20a_mm_gpuva_to_iova_base(cde_ctx->vm, | 437 | new_data = gpuva_to_iova_base(cde_ctx->vm, |
423 | cde_ctx->surf_vaddr); | 438 | cde_ctx->surf_vaddr); |
424 | if (new_data == 0) | 439 | if (new_data == 0) |
425 | return -EINVAL; | 440 | return -EINVAL; |
426 | break; | 441 | break; |
@@ -1100,7 +1115,7 @@ __releases(&l->cde_app->mutex) | |||
1100 | 1115 | ||
1101 | /* store surface vaddr. This is actually compbit vaddr, but since | 1116 | /* store surface vaddr. This is actually compbit vaddr, but since |
1102 | compbits live in the same surface, and we can get the alloc base | 1117 | compbits live in the same surface, and we can get the alloc base |
1103 | address by using gk20a_mm_gpuva_to_iova_base, this will do */ | 1118 | address by using gpuva_to_iova_base, this will do */ |
1104 | cde_ctx->surf_vaddr = map_vaddr; | 1119 | cde_ctx->surf_vaddr = map_vaddr; |
1105 | 1120 | ||
1106 | /* store information about destination */ | 1121 | /* store information about destination */ |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 32c74f3a..670e16d0 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -717,21 +717,6 @@ int setup_buffer_kind_and_compression(struct vm_gk20a *vm, | |||
717 | return 0; | 717 | return 0; |
718 | } | 718 | } |
719 | 719 | ||
720 | dma_addr_t gk20a_mm_gpuva_to_iova_base(struct vm_gk20a *vm, u64 gpu_vaddr) | ||
721 | { | ||
722 | struct nvgpu_mapped_buf *buffer; | ||
723 | dma_addr_t addr = 0; | ||
724 | struct gk20a *g = gk20a_from_vm(vm); | ||
725 | |||
726 | nvgpu_mutex_acquire(&vm->update_gmmu_lock); | ||
727 | buffer = __nvgpu_vm_find_mapped_buf(vm, gpu_vaddr); | ||
728 | if (buffer) | ||
729 | addr = nvgpu_mem_get_addr_sgl(g, buffer->sgt->sgl); | ||
730 | nvgpu_mutex_release(&vm->update_gmmu_lock); | ||
731 | |||
732 | return addr; | ||
733 | } | ||
734 | |||
735 | /* for gk20a the "video memory" apertures here are misnomers. */ | 720 | /* for gk20a the "video memory" apertures here are misnomers. */ |
736 | static inline u32 big_valid_pde0_bits(struct gk20a *g, | 721 | static inline u32 big_valid_pde0_bits(struct gk20a *g, |
737 | struct nvgpu_gmmu_pd *pd, u64 addr) | 722 | struct nvgpu_gmmu_pd *pd, u64 addr) |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 3a8fea45..448496f5 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -383,7 +383,6 @@ int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch); | |||
383 | 383 | ||
384 | void gk20a_get_comptags(struct device *dev, struct dma_buf *dmabuf, | 384 | void gk20a_get_comptags(struct device *dev, struct dma_buf *dmabuf, |
385 | struct gk20a_comptags *comptags); | 385 | struct gk20a_comptags *comptags); |
386 | dma_addr_t gk20a_mm_gpuva_to_iova_base(struct vm_gk20a *vm, u64 gpu_vaddr); | ||
387 | 386 | ||
388 | int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev); | 387 | int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev); |
389 | 388 | ||