diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-06-07 16:17:22 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-13 12:14:02 -0400 |
commit | 4f0e19d44dee9039378bce7bd0cfb11f36fd8926 (patch) | |
tree | 3d2349256da68b3c6ba2b0f513fbc51741d4d949 /drivers/gpu/nvgpu | |
parent | 263cb402293d2050d7d08212e89e4c1dcb1d4ccc (diff) |
gpu: nvgpu: gv11b: issue tsg preempt only
Preempt type should be set to tsg and id should be set to tsgid
in fifo_preempt_r(). Preempt type channel and id set to channel
id does not initiate preemption.
Bug 200289427
Bug 200292090
Bug 200289491
Change-Id: I2ae96c0b9ca8a88a8405f42775744f0879994887
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1497877
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 35 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 13 |
2 files changed, 21 insertions, 27 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 847bf172..90295f52 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -706,28 +706,13 @@ static int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id, | |||
706 | static int gv11b_fifo_preempt_channel(struct gk20a *g, u32 hw_chid) | 706 | static int gv11b_fifo_preempt_channel(struct gk20a *g, u32 hw_chid) |
707 | { | 707 | { |
708 | struct fifo_gk20a *f = &g->fifo; | 708 | struct fifo_gk20a *f = &g->fifo; |
709 | u32 ret = 0; | 709 | u32 tsgid; |
710 | u32 token = PMU_INVALID_MUTEX_OWNER_ID; | ||
711 | u32 mutex_ret = 0; | ||
712 | u32 runlist_id; | ||
713 | |||
714 | gk20a_dbg_fn("%d", hw_chid); | ||
715 | |||
716 | runlist_id = f->channel[hw_chid].runlist_id; | ||
717 | gk20a_dbg_fn("runlist_id %d", runlist_id); | ||
718 | |||
719 | nvgpu_mutex_acquire(&f->runlist_info[runlist_id].mutex); | ||
720 | |||
721 | mutex_ret = nvgpu_pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token); | ||
722 | |||
723 | ret = __locked_fifo_preempt(g, hw_chid, false); | ||
724 | |||
725 | if (!mutex_ret) | ||
726 | nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); | ||
727 | 710 | ||
728 | nvgpu_mutex_release(&f->runlist_info[runlist_id].mutex); | 711 | tsgid = f->channel[hw_chid].tsgid; |
712 | nvgpu_log_info(g, "chid:%d tsgid:%d", hw_chid, tsgid); | ||
729 | 713 | ||
730 | return ret; | 714 | /* Preempt tsg. Channel preempt is NOOP */ |
715 | return g->ops.fifo.preempt_tsg(g, tsgid); | ||
731 | } | 716 | } |
732 | 717 | ||
733 | static int __locked_fifo_preempt_runlists(struct gk20a *g, u32 runlists_mask) | 718 | static int __locked_fifo_preempt_runlists(struct gk20a *g, u32 runlists_mask) |
@@ -818,9 +803,15 @@ static int __locked_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, | |||
818 | unsigned int id_type, unsigned int timeout_rc_type) | 803 | unsigned int id_type, unsigned int timeout_rc_type) |
819 | { | 804 | { |
820 | int ret; | 805 | int ret; |
806 | struct fifo_gk20a *f = &g->fifo; | ||
821 | 807 | ||
822 | /* issue preempt */ | 808 | nvgpu_log_fn(g, "id:%d id_type:%d", id, id_type); |
823 | gk20a_fifo_issue_preempt(g, id, id_type); | 809 | |
810 | /* Issue tsg preempt. Channel preempt is noop */ | ||
811 | if (id_type == ID_TYPE_CHANNEL) | ||
812 | gk20a_fifo_issue_preempt(g, f->channel[id].tsgid, true); | ||
813 | else | ||
814 | gk20a_fifo_issue_preempt(g, id, true); | ||
824 | 815 | ||
825 | /* wait for preempt */ | 816 | /* wait for preempt */ |
826 | ret = g->ops.fifo.is_preempt_pending(g, id, id_type, | 817 | ret = g->ops.fifo.is_preempt_pending(g, id, id_type, |
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 503fb6f7..a703e72c 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -1593,12 +1593,15 @@ static int gr_gv11b_disable_channel_or_tsg(struct gk20a *g, struct channel_gk20a | |||
1593 | 1593 | ||
1594 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: restarted runlist"); | 1594 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: restarted runlist"); |
1595 | 1595 | ||
1596 | if (gk20a_is_channel_marked_as_tsg(fault_ch)) | 1596 | if (gk20a_is_channel_marked_as_tsg(fault_ch)) { |
1597 | gk20a_fifo_issue_preempt(g, fault_ch->tsgid, true); | 1597 | gk20a_fifo_issue_preempt(g, fault_ch->tsgid, true); |
1598 | else | 1598 | nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, |
1599 | gk20a_fifo_issue_preempt(g, fault_ch->hw_chid, false); | 1599 | "CILP: preempted the channel/tsg"); |
1600 | 1600 | } else { | |
1601 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: preempted the channel/tsg"); | 1601 | nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, |
1602 | "CILP: tsgid is invalid, cannot preempt"); | ||
1603 | WARN_ON(1); /* only TSG can be preempted */ | ||
1604 | } | ||
1602 | 1605 | ||
1603 | return ret; | 1606 | return ret; |
1604 | } | 1607 | } |