diff options
author | Santosh Katvate <skatvate@nvidia.com> | 2014-04-18 15:01:09 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:09:19 -0400 |
commit | 4d93f777450e5bf46d5001426b3a437810cd852b (patch) | |
tree | ac16d0288e04427cd9c7833326ebb5da134c4ff5 /drivers/gpu/nvgpu | |
parent | 9293a8b319e57c4c24f80ae7e3e11f99c3aaafca (diff) |
video: tegra: gk20a: Disable gfx before save zbc
This change disables gr engine before calling into pmu
for saving zbc and re-enables once it is finished.
Looks like NV_PPWR_PMU_BAR0_FECS_ERROR_CODE_PRI_TIMEOUT
error during access of NV_PLTCG_LTCS_LTSS_DSTG_ZBC_COLOR_CLEAR_VALUE
happens because of active concurrent memory traffic.
Bug 1489850
Change-Id: I60eacd718480a296f5a46438e18a519c7457f58a
Signed-off-by: Santosh Katvate <skatvate@nvidia.com>
Reviewed-on: http://git-master/r/398398
GVS: Gerrit_Virtual_Submit
(cherry picked from commit 42931088a3a1944359be61ebe39c646b41f73ee6)
Reviewed-on: http://git-master/r/402779
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index b2a92f81..08309f0f 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -3518,6 +3518,42 @@ clean_up: | |||
3518 | return ret; | 3518 | return ret; |
3519 | } | 3519 | } |
3520 | 3520 | ||
3521 | static void gr_gk20a_pmu_save_zbc(struct gk20a *g, u32 entries) | ||
3522 | { | ||
3523 | struct fifo_gk20a *f = &g->fifo; | ||
3524 | struct fifo_engine_info_gk20a *gr_info = | ||
3525 | f->engine_info + ENGINE_GR_GK20A; | ||
3526 | unsigned long end_jiffies = jiffies + | ||
3527 | msecs_to_jiffies(gk20a_get_gr_idle_timeout(g)); | ||
3528 | u32 ret; | ||
3529 | |||
3530 | ret = gk20a_fifo_disable_engine_activity(g, gr_info, true); | ||
3531 | if (ret) { | ||
3532 | gk20a_err(dev_from_gk20a(g), | ||
3533 | "failed to disable gr engine activity\n"); | ||
3534 | return; | ||
3535 | } | ||
3536 | |||
3537 | ret = gr_gk20a_wait_idle(g, end_jiffies, GR_IDLE_CHECK_DEFAULT); | ||
3538 | if (ret) { | ||
3539 | gk20a_err(dev_from_gk20a(g), | ||
3540 | "failed to idle graphics\n"); | ||
3541 | goto clean_up; | ||
3542 | } | ||
3543 | |||
3544 | /* update zbc */ | ||
3545 | gk20a_pmu_save_zbc(g, entries); | ||
3546 | |||
3547 | clean_up: | ||
3548 | ret = gk20a_fifo_enable_engine_activity(g, gr_info); | ||
3549 | if (ret) { | ||
3550 | gk20a_err(dev_from_gk20a(g), | ||
3551 | "failed to enable gr engine activity\n"); | ||
3552 | } | ||
3553 | |||
3554 | return; | ||
3555 | } | ||
3556 | |||
3521 | int gr_gk20a_add_zbc(struct gk20a *g, struct gr_gk20a *gr, | 3557 | int gr_gk20a_add_zbc(struct gk20a *g, struct gr_gk20a *gr, |
3522 | struct zbc_entry *zbc_val) | 3558 | struct zbc_entry *zbc_val) |
3523 | { | 3559 | { |
@@ -3607,7 +3643,7 @@ int gr_gk20a_add_zbc(struct gk20a *g, struct gr_gk20a *gr, | |||
3607 | /* update zbc for elpg only when new entry is added */ | 3643 | /* update zbc for elpg only when new entry is added */ |
3608 | entries = max(gr->max_used_color_index, | 3644 | entries = max(gr->max_used_color_index, |
3609 | gr->max_used_depth_index); | 3645 | gr->max_used_depth_index); |
3610 | gk20a_pmu_save_zbc(g, entries); | 3646 | gr_gk20a_pmu_save_zbc(g, entries); |
3611 | } | 3647 | } |
3612 | 3648 | ||
3613 | return ret; | 3649 | return ret; |