nvgpu: vgpu: create fifo.force_reset_ch in gpu_ops

gk20a_fifo_force_reset_ch() does not support vgpu now, so we need to
create a function pointer in gpu_ops and assign it differently for
vgpu and non-vgpu.

Bug 200184349

Change-Id: I5f8f4f731b4b970c4ff8de65531f25568e7691b6
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/1130420
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

5 files changed, 25 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 0d7a6bec..189ec330 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -3114,10 +3114,10 @@ long gk20a_channel_ioctl(struct file *filp,
                                 __func__, cmd);
                         break;
                 }
-                /* enable channel */
-                gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid),
-                        gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid)) |
-                        ccsr_channel_enable_set_true_f());
+                if (ch->g->ops.fifo.enable_channel)
+                        ch->g->ops.fifo.enable_channel(ch);
+                else
+                        err = -ENOSYS;
                 gk20a_idle(dev);
                 break;
         case NVGPU_IOCTL_CHANNEL_DISABLE:
@@ -3128,10 +3128,10 @@ long gk20a_channel_ioctl(struct file *filp,
                                 __func__, cmd);
                         break;
                 }
-                /* disable channel */
-                gk20a_writel(ch->g, ccsr_channel_r(ch->hw_chid),
-                        gk20a_readl(ch->g, ccsr_channel_r(ch->hw_chid)) |
-                        ccsr_channel_enable_clr_true_f());
+                if (ch->g->ops.fifo.disable_channel)
+                        ch->g->ops.fifo.disable_channel(ch);
+                else
+                        err = -ENOSYS;
                 gk20a_idle(dev);
                 break;
         case NVGPU_IOCTL_CHANNEL_PREEMPT:
@@ -3153,7 +3153,7 @@ long gk20a_channel_ioctl(struct file *filp,
                                 __func__, cmd);
                         break;
                 }
-                err = gk20a_fifo_force_reset_ch(ch, true);
+                err = ch->g->ops.fifo.force_reset_ch(ch, true);
                 gk20a_idle(dev);
                 break;
         case NVGPU_IOCTL_CHANNEL_EVENT_ID_CTRL:
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index aa8e0c40..eccea4d4 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -2693,4 +2693,5 @@ void gk20a_init_fifo(struct gpu_ops *gops)
         gops->fifo.get_num_fifos = gk20a_fifo_get_num_fifos;
         gops->fifo.get_pbdma_signature = gk20a_fifo_get_pbdma_signature;
         gops->fifo.set_runlist_interleave = gk20a_fifo_set_runlist_interleave;
+        gops->fifo.force_reset_ch = gk20a_fifo_force_reset_ch;
 }
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 0b15783b..ebc18d5d 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -319,6 +319,7 @@ struct gpu_ops {
                                         u32 new_level);
                 int (*channel_set_timeslice)(struct channel_gk20a *ch,
                                         u32 timeslice);
+                int (*force_reset_ch)(struct channel_gk20a *ch, bool verbose);
         } fifo;
         struct pmu_v {
                 /*used for change of enum zbc update cmd id from ver 0 to ver1*/
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
index 8586262f..e738b1d2 100644
--- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
@@ -125,4 +125,5 @@ void gm20b_init_fifo(struct gpu_ops *gops)
         gops->fifo.get_num_fifos = gm20b_fifo_get_num_fifos;
         gops->fifo.get_pbdma_signature = gk20a_fifo_get_pbdma_signature;
         gops->fifo.set_runlist_interleave = gk20a_fifo_set_runlist_interleave;
+        gops->fifo.force_reset_ch = gk20a_fifo_force_reset_ch;
 }
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
index dc82d57b..66b5e410 100644
--- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
@@ -585,6 +585,17 @@ static int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice)
         return err ? err : msg.ret;
 }
 
+static int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, bool verbose)
+{
+        gk20a_dbg_fn("");
+
+        if (verbose)
+                gk20a_warn(dev_from_gk20a(ch->g),
+                        "channel force reset is not supported");
+
+        return -ENOSYS;
+}
+
 static void vgpu_fifo_set_ctx_mmu_error(struct gk20a *g,
                 struct channel_gk20a *ch)
 {
@@ -664,6 +675,7 @@ void vgpu_init_fifo_ops(struct gpu_ops *gops)
 {
         gops->fifo.bind_channel = vgpu_channel_bind;
         gops->fifo.unbind_channel = vgpu_channel_unbind;
+        gops->fifo.enable_channel = NULL;
         gops->fifo.disable_channel = vgpu_channel_disable;
         gops->fifo.alloc_inst = vgpu_channel_alloc_inst;
         gops->fifo.free_inst = vgpu_channel_free_inst;
@@ -674,4 +686,5 @@ void vgpu_init_fifo_ops(struct gpu_ops *gops)
         gops->fifo.channel_set_priority = vgpu_channel_set_priority;
         gops->fifo.set_runlist_interleave = vgpu_fifo_set_runlist_interleave;
         gops->fifo.channel_set_timeslice = vgpu_channel_set_timeslice;
+        gops->fifo.force_reset_ch = vgpu_fifo_force_reset_ch;
 }