gpu: nvgpu: gk20a: Fix G_ELPG flush poll

We poll completion of flush sequence by polling the broadcast
register. The polling should be done for a per-slice register
instead.

Bug 1457723

Change-Id: I10aba939175b6d05b05f5f26eebebcbe09d9b4a7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/382521
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>

4 files changed, 36 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index c19b2bf8..3bc53992 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -73,6 +73,7 @@ struct gpu_ops {
                 int  (*init_zbc)(struct gk20a *g, struct gr_gk20a *gr);
                 void (*init_cbc)(struct gk20a *g, struct gr_gk20a *gr);
                 void (*sync_debugfs)(struct gk20a *g);
+                void (*init_fs_state)(struct gk20a *g);
                 void (*elpg_flush)(struct gk20a *g);
         } ltc;
         struct {
@@ -287,6 +288,8 @@ struct gk20a {
 
         int irq_stall;
         int irq_nonstall;
+        u32 max_ltc_count;
+        u32 ltc_count;
 
         struct generic_pm_domain pd;
 
diff --git a/drivers/gpu/nvgpu/gk20a/hw_ltc_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_ltc_gk20a.h
index 65221b59..8ea4ef71 100644
--- a/drivers/gpu/nvgpu/gk20a/hw_ltc_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/hw_ltc_gk20a.h
@@ -198,19 +198,35 @@ static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(void)
 {
         return 0x10000000;
 }
-static inline u32 ltc_ltss_g_elpg_r(void)
+static inline u32 ltc_ltcs_ltss_g_elpg_r(void)
 {
         return 0x0017e828;
 }
-static inline u32 ltc_ltss_g_elpg_flush_v(u32 r)
+static inline u32 ltc_ltcs_ltss_g_elpg_flush_v(u32 r)
 {
         return (r >> 0) & 0x1;
 }
-static inline u32 ltc_ltss_g_elpg_flush_pending_v(void)
+static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_v(void)
 {
         return 0x00000001;
 }
-static inline u32 ltc_ltss_g_elpg_flush_pending_f(void)
+static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_f(void)
+{
+        return 0x1;
+}
+static inline u32 ltc_ltc0_ltss_g_elpg_r(void)
+{
+        return 0x00140828;
+}
+static inline u32 ltc_ltc0_ltss_g_elpg_flush_v(u32 r)
+{
+        return (r >> 0) & 0x1;
+}
+static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_v(void)
+{
+        return 0x00000001;
+}
+static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_f(void)
 {
         return 0x1;
 }
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_common.c b/drivers/gpu/nvgpu/gk20a/ltc_common.c
index cbb27cc7..bc45ac41 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_common.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_common.c
@@ -222,13 +222,13 @@ static void gk20a_mm_g_elpg_flush_locked(struct gk20a *g)
         /* Make sure all previous writes are committed to the L2. There's no
            guarantee that writes are to DRAM. This will be a sysmembar internal
            to the L2. */
-        gk20a_writel(g, ltc_ltss_g_elpg_r(),
-                     ltc_ltss_g_elpg_flush_pending_f());
+        gk20a_writel(g, ltc_ltcs_ltss_g_elpg_r(),
+                     ltc_ltcs_ltss_g_elpg_flush_pending_f());
         do {
-                data = gk20a_readl(g, ltc_ltss_g_elpg_r());
+                data = gk20a_readl(g, ltc_ltc0_ltss_g_elpg_r());
 
-                if (ltc_ltss_g_elpg_flush_v(data) ==
-                    ltc_ltss_g_elpg_flush_pending_v()) {
+                if (ltc_ltc0_ltss_g_elpg_flush_v(data) ==
+                    ltc_ltc0_ltss_g_elpg_flush_pending_v()) {
                         gk20a_dbg_info("g_elpg_flush 0x%x", data);
                         retry--;
                         usleep_range(20, 40);
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
index 08aedecd..6da5adb9 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
@@ -184,6 +184,13 @@ static void gk20a_ltc_sync_debugfs(struct gk20a *g)
 }
 #endif
 
+static void gk20a_ltc_init_fs_state(struct gk20a *g)
+{
+        gk20a_dbg_info("initialize gk20a L2");
+
+        g->max_ltc_count = g->ltc_count = 1;
+}
+
 void gk20a_init_ltc(struct gpu_ops *gops)
 {
         gops->ltc.determine_L2_size_bytes = gk20a_determine_L2_size_bytes;
@@ -200,4 +207,5 @@ void gk20a_init_ltc(struct gpu_ops *gops)
         gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs;
 #endif
         gops->ltc.elpg_flush = gk20a_mm_g_elpg_flush_locked;
+        gops->ltc.init_fs_state = gk20a_ltc_init_fs_state;
 }