gpu: nvgpu: Move PRAMIN functions to nvgpu_mem

PRAMIN batch access functions are only used by nvgpu_mem. The way
the functions are written is Linux specific, so move the
implementation from common PRAMIN code.

JIRA NVGPU-259

Change-Id: I6e2aba08c98568c651a86fe8ca7f9f5220d67348
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569697
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 49 insertions, 56 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c b/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c
index e8aea0be..9b9f58e1 100644
--- a/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c
+++ b/drivers/gpu/nvgpu/common/linux/nvgpu_mem.c
@@ -102,6 +102,23 @@ void nvgpu_mem_end(struct gk20a *g, struct nvgpu_mem *mem)
         mem->cpu_va = NULL;
 }
 
+static void pramin_access_batch_rd_n(struct gk20a *g, u32 start, u32 words, u32 **arg)
+{
+        u32 r = start, *dest_u32 = *arg;
+
+        if (!g->regs) {
+                __gk20a_warn_on_no_regs();
+                return;
+        }
+
+        while (words--) {
+                *dest_u32++ = gk20a_readl(g, r);
+                r += sizeof(u32);
+        }
+
+        *arg = dest_u32;
+}
+
 u32 nvgpu_mem_rd32(struct gk20a *g, struct nvgpu_mem *mem, u32 w)
 {
         u32 data = 0;
@@ -162,6 +179,23 @@ void nvgpu_mem_rd_n(struct gk20a *g, struct nvgpu_mem *mem,
         }
 }
 
+static void pramin_access_batch_wr_n(struct gk20a *g, u32 start, u32 words, u32 **arg)
+{
+        u32 r = start, *src_u32 = *arg;
+
+        if (!g->regs) {
+                __gk20a_warn_on_no_regs();
+                return;
+        }
+
+        while (words--) {
+                writel_relaxed(*src_u32++, g->regs + r);
+                r += sizeof(u32);
+        }
+
+        *arg = src_u32;
+}
+
 void nvgpu_mem_wr32(struct gk20a *g, struct nvgpu_mem *mem, u32 w, u32 data)
 {
         if (mem->aperture == APERTURE_SYSMEM && !g->mm.force_pramin) {
@@ -219,6 +253,21 @@ void nvgpu_mem_wr_n(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
         }
 }
 
+static void pramin_access_batch_set(struct gk20a *g, u32 start, u32 words, u32 **arg)
+{
+        u32 r = start, repeat = **arg;
+
+        if (!g->regs) {
+                __gk20a_warn_on_no_regs();
+                return;
+        }
+
+        while (words--) {
+                writel_relaxed(repeat, g->regs + r);
+                r += sizeof(u32);
+        }
+}
+
 void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
                 u32 c, u32 size)
 {
diff --git a/drivers/gpu/nvgpu/common/pramin.c b/drivers/gpu/nvgpu/common/pramin.c
index 56179a6b..abe5b561 100644
--- a/drivers/gpu/nvgpu/common/pramin.c
+++ b/drivers/gpu/nvgpu/common/pramin.c
@@ -34,55 +34,6 @@
  */
 #define GK20A_FORCE_PRAMIN_DEFAULT false
 
-void pramin_access_batch_rd_n(struct gk20a *g, u32 start, u32 words, u32 **arg)
-{
-        u32 r = start, *dest_u32 = *arg;
-
-        if (!g->regs) {
-                __gk20a_warn_on_no_regs();
-                return;
-        }
-
-        while (words--) {
-                *dest_u32++ = gk20a_readl(g, r);
-                r += sizeof(u32);
-        }
-
-        *arg = dest_u32;
-}
-
-void pramin_access_batch_wr_n(struct gk20a *g, u32 start, u32 words, u32 **arg)
-{
-        u32 r = start, *src_u32 = *arg;
-
-        if (!g->regs) {
-                __gk20a_warn_on_no_regs();
-                return;
-        }
-
-        while (words--) {
-                writel_relaxed(*src_u32++, g->regs + r);
-                r += sizeof(u32);
-        }
-
-        *arg = src_u32;
-}
-
-void pramin_access_batch_set(struct gk20a *g, u32 start, u32 words, u32 **arg)
-{
-        u32 r = start, repeat = **arg;
-
-        if (!g->regs) {
-                __gk20a_warn_on_no_regs();
-                return;
-        }
-
-        while (words--) {
-                writel_relaxed(repeat, g->regs + r);
-                r += sizeof(u32);
-        }
-}
-
 /*
  * The PRAMIN range is 1 MB, must change base addr if a buffer crosses that.
  * This same loop is used for read/write/memset. Offset and size in bytes.
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pramin.h b/drivers/gpu/nvgpu/include/nvgpu/pramin.h
index 4c0fea14..687f247a 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pramin.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pramin.h
@@ -36,13 +36,6 @@ struct nvgpu_mem;
 typedef void (*pramin_access_batch_fn)(struct gk20a *g, u32 start, u32 words,
                                        u32 **arg);
 
-/*
- * Generally useful batch functions.
- */
-void pramin_access_batch_rd_n(struct gk20a *g, u32 start, u32 words, u32 **arg);
-void pramin_access_batch_wr_n(struct gk20a *g, u32 start, u32 words, u32 **arg);
-void pramin_access_batch_set(struct gk20a *g, u32 start, u32 words, u32 **arg);
-
 void nvgpu_pramin_access_batched(struct gk20a *g, struct nvgpu_mem *mem,
                                  u32 offset, u32 size,
                                  pramin_access_batch_fn loop, u32 **arg);