diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2018-04-25 06:08:49 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-05-07 12:45:14 -0400 |
commit | 15ec5722be8f483f6d9c1cd0bfd61a7e2bcbfca2 (patch) | |
tree | 8bc083a63442113d8a9773b555ae3d1bff8958df /drivers/gpu/nvgpu | |
parent | bb7ed28ab17ce68c71838bc2aa3fd6e2a0a71a15 (diff) |
gpu: nvgpu: add HAL to handle nonstall interrupts
Add new HAL gops.mc.isr_nonstall() to handle nonstall interrupts
We already handle nonstall interrupts in nvgpu_intr_nonstall()
But this API is completely in linux specific code
Separate out os-independent code to handle nonstall interrupts in new API
mc_gk20a_isr_nonstall() and set it to HAL gops.mc.isr_nonstall() for all
existing chips
Call this HAL from nvgpu_intr_nonstall()
Jira NVGPUT-8
Change-Id: Iec6a56db03158a72a256f7eee8989a0a8a42ae2f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1706589
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/intr.c | 35 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mc_gk20a.c | 39 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mc_gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv100/hal_gv100.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | 1 |
11 files changed, 52 insertions, 31 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/intr.c b/drivers/gpu/nvgpu/common/linux/intr.c index 6b4b2dc9..05dd3f2a 100644 --- a/drivers/gpu/nvgpu/common/linux/intr.c +++ b/drivers/gpu/nvgpu/common/linux/intr.c | |||
@@ -69,11 +69,8 @@ irqreturn_t nvgpu_intr_thread_stall(struct gk20a *g) | |||
69 | 69 | ||
70 | irqreturn_t nvgpu_intr_nonstall(struct gk20a *g) | 70 | irqreturn_t nvgpu_intr_nonstall(struct gk20a *g) |
71 | { | 71 | { |
72 | u32 mc_intr_1; | 72 | u32 non_stall_intr_val; |
73 | u32 hw_irq_count; | 73 | u32 hw_irq_count; |
74 | u32 engine_id_idx; | ||
75 | u32 active_engine_id = 0; | ||
76 | u32 engine_enum = ENGINE_INVAL_GK20A; | ||
77 | int ops_old, ops_new, ops = 0; | 74 | int ops_old, ops_new, ops = 0; |
78 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); | 75 | struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); |
79 | 76 | ||
@@ -81,37 +78,13 @@ irqreturn_t nvgpu_intr_nonstall(struct gk20a *g) | |||
81 | return IRQ_NONE; | 78 | return IRQ_NONE; |
82 | 79 | ||
83 | /* not from gpu when sharing irq with others */ | 80 | /* not from gpu when sharing irq with others */ |
84 | mc_intr_1 = g->ops.mc.intr_nonstall(g); | 81 | non_stall_intr_val = g->ops.mc.intr_nonstall(g); |
85 | if (unlikely(!mc_intr_1)) | 82 | if (unlikely(!non_stall_intr_val)) |
86 | return IRQ_NONE; | 83 | return IRQ_NONE; |
87 | 84 | ||
88 | g->ops.mc.intr_nonstall_pause(g); | 85 | g->ops.mc.intr_nonstall_pause(g); |
89 | 86 | ||
90 | if (g->ops.mc.is_intr1_pending(g, NVGPU_UNIT_FIFO, mc_intr_1)) | 87 | ops = g->ops.mc.isr_nonstall(g); |
91 | ops |= gk20a_fifo_nonstall_isr(g); | ||
92 | |||
93 | for (engine_id_idx = 0; engine_id_idx < g->fifo.num_engines; | ||
94 | engine_id_idx++) { | ||
95 | struct fifo_engine_info_gk20a *engine_info; | ||
96 | |||
97 | active_engine_id = g->fifo.active_engines_list[engine_id_idx]; | ||
98 | engine_info = &g->fifo.engine_info[active_engine_id]; | ||
99 | |||
100 | if (mc_intr_1 & engine_info->intr_mask) { | ||
101 | engine_enum = engine_info->engine_enum; | ||
102 | /* GR Engine */ | ||
103 | if (engine_enum == ENGINE_GR_GK20A) | ||
104 | ops |= gk20a_gr_nonstall_isr(g); | ||
105 | |||
106 | /* CE Engine */ | ||
107 | if (((engine_enum == ENGINE_GRCE_GK20A) || | ||
108 | (engine_enum == ENGINE_ASYNC_CE_GK20A)) && | ||
109 | g->ops.ce2.isr_nonstall) | ||
110 | ops |= g->ops.ce2.isr_nonstall(g, | ||
111 | engine_info->inst_id, | ||
112 | engine_info->pri_base); | ||
113 | } | ||
114 | } | ||
115 | if (ops) { | 88 | if (ops) { |
116 | do { | 89 | do { |
117 | ops_old = atomic_read(&l->nonstall_ops); | 90 | ops_old = atomic_read(&l->nonstall_ops); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 03cfe285..bf2e0dbb 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -1066,6 +1066,7 @@ struct gpu_ops { | |||
1066 | u32 (*intr_nonstall)(struct gk20a *g); | 1066 | u32 (*intr_nonstall)(struct gk20a *g); |
1067 | void (*intr_nonstall_pause)(struct gk20a *g); | 1067 | void (*intr_nonstall_pause)(struct gk20a *g); |
1068 | void (*intr_nonstall_resume)(struct gk20a *g); | 1068 | void (*intr_nonstall_resume)(struct gk20a *g); |
1069 | int (*isr_nonstall)(struct gk20a *g); | ||
1069 | void (*enable)(struct gk20a *g, u32 units); | 1070 | void (*enable)(struct gk20a *g, u32 units); |
1070 | void (*disable)(struct gk20a *g, u32 units); | 1071 | void (*disable)(struct gk20a *g, u32 units); |
1071 | void (*reset)(struct gk20a *g, u32 units); | 1072 | void (*reset)(struct gk20a *g, u32 units); |
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c index e6d81a87..7fed410e 100644 --- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c | |||
@@ -74,6 +74,45 @@ void mc_gk20a_isr_stall(struct gk20a *g) | |||
74 | g->ops.bus.isr(g); | 74 | g->ops.bus.isr(g); |
75 | } | 75 | } |
76 | 76 | ||
77 | int mc_gk20a_isr_nonstall(struct gk20a *g) | ||
78 | { | ||
79 | int ops = 0; | ||
80 | u32 mc_intr_1; | ||
81 | u32 engine_id_idx; | ||
82 | u32 active_engine_id = 0; | ||
83 | u32 engine_enum = ENGINE_INVAL_GK20A; | ||
84 | |||
85 | mc_intr_1 = g->ops.mc.intr_nonstall(g); | ||
86 | |||
87 | if (g->ops.mc.is_intr1_pending(g, NVGPU_UNIT_FIFO, mc_intr_1)) | ||
88 | ops |= gk20a_fifo_nonstall_isr(g); | ||
89 | |||
90 | for (engine_id_idx = 0; engine_id_idx < g->fifo.num_engines; | ||
91 | engine_id_idx++) { | ||
92 | struct fifo_engine_info_gk20a *engine_info; | ||
93 | |||
94 | active_engine_id = g->fifo.active_engines_list[engine_id_idx]; | ||
95 | engine_info = &g->fifo.engine_info[active_engine_id]; | ||
96 | |||
97 | if (mc_intr_1 & engine_info->intr_mask) { | ||
98 | engine_enum = engine_info->engine_enum; | ||
99 | /* GR Engine */ | ||
100 | if (engine_enum == ENGINE_GR_GK20A) | ||
101 | ops |= gk20a_gr_nonstall_isr(g); | ||
102 | |||
103 | /* CE Engine */ | ||
104 | if (((engine_enum == ENGINE_GRCE_GK20A) || | ||
105 | (engine_enum == ENGINE_ASYNC_CE_GK20A)) && | ||
106 | g->ops.ce2.isr_nonstall) | ||
107 | ops |= g->ops.ce2.isr_nonstall(g, | ||
108 | engine_info->inst_id, | ||
109 | engine_info->pri_base); | ||
110 | } | ||
111 | } | ||
112 | |||
113 | return ops; | ||
114 | } | ||
115 | |||
77 | void mc_gk20a_intr_enable(struct gk20a *g) | 116 | void mc_gk20a_intr_enable(struct gk20a *g) |
78 | { | 117 | { |
79 | u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g); | 118 | u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g); |
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.h b/drivers/gpu/nvgpu/gk20a/mc_gk20a.h index 870a1d3f..1ce308b8 100644 --- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.h | |||
@@ -32,6 +32,7 @@ u32 mc_gk20a_intr_stall(struct gk20a *g); | |||
32 | void mc_gk20a_intr_stall_pause(struct gk20a *g); | 32 | void mc_gk20a_intr_stall_pause(struct gk20a *g); |
33 | void mc_gk20a_intr_stall_resume(struct gk20a *g); | 33 | void mc_gk20a_intr_stall_resume(struct gk20a *g); |
34 | u32 mc_gk20a_intr_nonstall(struct gk20a *g); | 34 | u32 mc_gk20a_intr_nonstall(struct gk20a *g); |
35 | int mc_gk20a_isr_nonstall(struct gk20a *g); | ||
35 | void mc_gk20a_intr_nonstall_pause(struct gk20a *g); | 36 | void mc_gk20a_intr_nonstall_pause(struct gk20a *g); |
36 | void mc_gk20a_intr_nonstall_resume(struct gk20a *g); | 37 | void mc_gk20a_intr_nonstall_resume(struct gk20a *g); |
37 | void gk20a_mc_enable(struct gk20a *g, u32 units); | 38 | void gk20a_mc_enable(struct gk20a *g, u32 units); |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 328c1c38..26b3f61a 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -573,6 +573,7 @@ static const struct gpu_ops gm20b_ops = { | |||
573 | .intr_nonstall = mc_gk20a_intr_nonstall, | 573 | .intr_nonstall = mc_gk20a_intr_nonstall, |
574 | .intr_nonstall_pause = mc_gk20a_intr_nonstall_pause, | 574 | .intr_nonstall_pause = mc_gk20a_intr_nonstall_pause, |
575 | .intr_nonstall_resume = mc_gk20a_intr_nonstall_resume, | 575 | .intr_nonstall_resume = mc_gk20a_intr_nonstall_resume, |
576 | .isr_nonstall = mc_gk20a_isr_nonstall, | ||
576 | .enable = gk20a_mc_enable, | 577 | .enable = gk20a_mc_enable, |
577 | .disable = gk20a_mc_disable, | 578 | .disable = gk20a_mc_disable, |
578 | .reset = gk20a_mc_reset, | 579 | .reset = gk20a_mc_reset, |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 03e3bd07..82cc36aa 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -688,6 +688,7 @@ static const struct gpu_ops gp106_ops = { | |||
688 | .intr_nonstall = mc_gp10b_intr_nonstall, | 688 | .intr_nonstall = mc_gp10b_intr_nonstall, |
689 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, | 689 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, |
690 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, | 690 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, |
691 | .isr_nonstall = mc_gk20a_isr_nonstall, | ||
691 | .enable = gk20a_mc_enable, | 692 | .enable = gk20a_mc_enable, |
692 | .disable = gk20a_mc_disable, | 693 | .disable = gk20a_mc_disable, |
693 | .reset = gk20a_mc_reset, | 694 | .reset = gk20a_mc_reset, |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index f0c6b410..79eeb25a 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -621,6 +621,7 @@ static const struct gpu_ops gp10b_ops = { | |||
621 | .intr_nonstall = mc_gp10b_intr_nonstall, | 621 | .intr_nonstall = mc_gp10b_intr_nonstall, |
622 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, | 622 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, |
623 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, | 623 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, |
624 | .isr_nonstall = mc_gk20a_isr_nonstall, | ||
624 | .enable = gk20a_mc_enable, | 625 | .enable = gk20a_mc_enable, |
625 | .disable = gk20a_mc_disable, | 626 | .disable = gk20a_mc_disable, |
626 | .reset = gk20a_mc_reset, | 627 | .reset = gk20a_mc_reset, |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 838dbf87..40f16ed1 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -745,6 +745,7 @@ static const struct gpu_ops gv100_ops = { | |||
745 | .intr_nonstall = mc_gp10b_intr_nonstall, | 745 | .intr_nonstall = mc_gp10b_intr_nonstall, |
746 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, | 746 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, |
747 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, | 747 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, |
748 | .isr_nonstall = mc_gk20a_isr_nonstall, | ||
748 | .enable = gk20a_mc_enable, | 749 | .enable = gk20a_mc_enable, |
749 | .disable = gk20a_mc_disable, | 750 | .disable = gk20a_mc_disable, |
750 | .reset = gk20a_mc_reset, | 751 | .reset = gk20a_mc_reset, |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 76820d2e..c62dee26 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -684,6 +684,7 @@ static const struct gpu_ops gv11b_ops = { | |||
684 | .intr_nonstall = mc_gp10b_intr_nonstall, | 684 | .intr_nonstall = mc_gp10b_intr_nonstall, |
685 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, | 685 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, |
686 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, | 686 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, |
687 | .isr_nonstall = mc_gk20a_isr_nonstall, | ||
687 | .enable = gk20a_mc_enable, | 688 | .enable = gk20a_mc_enable, |
688 | .disable = gk20a_mc_disable, | 689 | .disable = gk20a_mc_disable, |
689 | .reset = gk20a_mc_reset, | 690 | .reset = gk20a_mc_reset, |
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index 78b8d012..6b593359 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |||
@@ -494,6 +494,7 @@ static const struct gpu_ops vgpu_gp10b_ops = { | |||
494 | .intr_nonstall = mc_gp10b_intr_nonstall, | 494 | .intr_nonstall = mc_gp10b_intr_nonstall, |
495 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, | 495 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, |
496 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, | 496 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, |
497 | .isr_nonstall = mc_gk20a_isr_nonstall, | ||
497 | .enable = gk20a_mc_enable, | 498 | .enable = gk20a_mc_enable, |
498 | .disable = gk20a_mc_disable, | 499 | .disable = gk20a_mc_disable, |
499 | .reset = gk20a_mc_reset, | 500 | .reset = gk20a_mc_reset, |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index deb5f37f..1b78a4c9 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | |||
@@ -541,6 +541,7 @@ static const struct gpu_ops vgpu_gv11b_ops = { | |||
541 | .intr_nonstall = mc_gp10b_intr_nonstall, | 541 | .intr_nonstall = mc_gp10b_intr_nonstall, |
542 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, | 542 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, |
543 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, | 543 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, |
544 | .isr_nonstall = mc_gk20a_isr_nonstall, | ||
544 | .enable = gk20a_mc_enable, | 545 | .enable = gk20a_mc_enable, |
545 | .disable = gk20a_mc_disable, | 546 | .disable = gk20a_mc_disable, |
546 | .reset = gk20a_mc_reset, | 547 | .reset = gk20a_mc_reset, |