diff options
author | Alex Frid <afrid@nvidia.com> | 2014-07-26 01:30:37 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:36 -0400 |
commit | 14315a95613f7323283c70cf14d870e58b8bdb54 (patch) | |
tree | ff9f47a32478486aafbcef6fe6a77f81bc1f2f52 /drivers/gpu/nvgpu | |
parent | e34b945834c4fa0ca7aa50224e8d77fafa5fe7e3 (diff) |
gpu: nvgpu: Expand GM20b PLL fields header
Added masks for GM20b GPCPLL input and post dividers.
Bug 1450787
Change-Id: I39a9c7ffb740fa9ef3a614deb2591412e34ef263
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/447857
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hw_trim_gm20b.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hw_trim_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_trim_gm20b.h index 6a4c10e5..487cd959 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_trim_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_trim_gm20b.h | |||
@@ -126,6 +126,10 @@ static inline u32 trim_sys_gpcpll_coeff_mdiv_f(u32 v) | |||
126 | { | 126 | { |
127 | return (v & 0xff) << 0; | 127 | return (v & 0xff) << 0; |
128 | } | 128 | } |
129 | static inline u32 trim_sys_gpcpll_coeff_mdiv_m(void) | ||
130 | { | ||
131 | return 0xff << 0; | ||
132 | } | ||
129 | static inline u32 trim_sys_gpcpll_coeff_mdiv_v(u32 r) | 133 | static inline u32 trim_sys_gpcpll_coeff_mdiv_v(u32 r) |
130 | { | 134 | { |
131 | return (r >> 0) & 0xff; | 135 | return (r >> 0) & 0xff; |
@@ -146,6 +150,10 @@ static inline u32 trim_sys_gpcpll_coeff_pldiv_f(u32 v) | |||
146 | { | 150 | { |
147 | return (v & 0x3f) << 16; | 151 | return (v & 0x3f) << 16; |
148 | } | 152 | } |
153 | static inline u32 trim_sys_gpcpll_coeff_pldiv_m(void) | ||
154 | { | ||
155 | return 0x3f << 16; | ||
156 | } | ||
149 | static inline u32 trim_sys_gpcpll_coeff_pldiv_v(u32 r) | 157 | static inline u32 trim_sys_gpcpll_coeff_pldiv_v(u32 r) |
150 | { | 158 | { |
151 | return (r >> 16) & 0x3f; | 159 | return (r >> 16) & 0x3f; |