gpu: nvgpu: add suspend_single_sm gr ops

This is required to support multiple SM and t19x
sm register address changes

JIRA GPUT19X-75

Change-Id: Id104f611736535874cdaa5a2f768f692d799c2c5
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1512214
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

5 files changed, 13 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index a1ad96b9..f97534b5 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -370,6 +370,9 @@ struct gpu_ops {
                 int (*set_czf_bypass)(struct gk20a *g,
                                       struct channel_gk20a *ch);
                 bool (*sm_debugger_attached)(struct gk20a *g);
+                void (*suspend_single_sm)(struct gk20a *g,
+                                u32 gpc, u32 tpc, u32 sm,
+                                u32 global_esr_mask, bool check_errors);
         } gr;
         struct {
                 void (*init_hw)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 4c1a61a9..64b991a2 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -8013,16 +8013,13 @@ int gk20a_gr_wait_for_sm_lock_down(struct gk20a *g, u32 gpc, u32 tpc,
         return -ETIMEDOUT;
 }
 
-void gk20a_suspend_single_sm(struct gk20a *g,
-                u32 gpc, u32 tpc,
+void gk20a_gr_suspend_single_sm(struct gk20a *g,
+                u32 gpc, u32 tpc, u32 sm,
                 u32 global_esr_mask, bool check_errors)
 {
-        u32 offset;
         int err;
         u32 dbgr_control0;
-        u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
-        u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE);
-        offset = gpc_stride * gpc + tpc_in_gpc_stride * tpc;
+        u32 offset = gk20a_gr_gpc_offset(g, gpc) + gk20a_gr_tpc_offset(g, tpc);
 
         /* if an SM debugger isn't attached, skip suspend */
         if (!g->ops.gr.sm_debugger_attached(g)) {
@@ -8031,6 +8028,9 @@ void gk20a_suspend_single_sm(struct gk20a *g,
                 return;
         }
 
+        nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
+                "suspending gpc:%d, tpc:%d, sm%d", gpc, tpc, sm);
+
         /* assert stop trigger. */
         dbgr_control0 = gk20a_readl(g,
                                 gr_gpc0_tpc0_sm_dbgr_control0_r() + offset);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index dd11a082..a9b7c2d7 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -615,8 +615,8 @@ int gr_gk20a_enable_ctxsw(struct gk20a *g);
 void gk20a_resume_single_sm(struct gk20a *g,
                 u32 gpc, u32 tpc);
 void gk20a_resume_all_sms(struct gk20a *g);
-void gk20a_suspend_single_sm(struct gk20a *g,
-                u32 gpc, u32 tpc,
+void gk20a_gr_suspend_single_sm(struct gk20a *g,
+                u32 gpc, u32 tpc, u32 sm,
                 u32 global_esr_mask, bool check_errors);
 void gk20a_suspend_all_sms(struct gk20a *g,
                 u32 global_esr_mask, bool check_errors);
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 043e2855..d985a44d 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1631,4 +1631,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
         gops->gr.tpc_enabled_exceptions = gr_gk20a_tpc_enabled_exceptions;
         gops->gr.get_esr_sm_sel = gk20a_gr_get_esr_sm_sel;
         gops->gr.sm_debugger_attached = gk20a_gr_sm_debugger_attached;
+        gops->gr.suspend_single_sm = gk20a_gr_suspend_single_sm;
 }
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
index 2a3ecd31..5d17472f 100644
--- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c
@@ -1829,7 +1829,7 @@ static int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
                                 gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg,
                                                 "CILP: STOP_TRIGGER from gpc %d tpc %d\n",
                                                 gpc, tpc);
-                                gk20a_suspend_single_sm(g, gpc, tpc, global_mask, true);
+                                g->ops.gr.suspend_single_sm(g, gpc, tpc, sm, global_mask, true);
                         }
 
                         /* reset the HWW errors after locking down */