gpu: nvgpu: volt: fix MISRA Rule 10.4 Violations

MISRA Rule 10.4 only allows the usage of arithmetic operations on
operands of the same essential type category.

Adding "U" at the end of the integer literals to have same type of
operands when an arithmetic operation is performed.

This fixes violation where an arithmetic operation is performed on
signed and unsigned int types.

JIRA NVGPU-992

Change-Id: Ic9a911beb6d161df950ca85eb4813547603a8743
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1809751
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/volt/volt_rail.h b/drivers/gpu/nvgpu/volt/volt_rail.h
index 522d635a..72bb2546 100644
--- a/drivers/gpu/nvgpu/volt/volt_rail.h
+++ b/drivers/gpu/nvgpu/volt/volt_rail.h
@@ -27,8 +27,8 @@
 #include "boardobj/boardobj.h"
 #include "boardobj/boardobjgrp.h"
 
-#define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES   0x04
-#define CTRL_PMGR_PWR_EQUATION_INDEX_INVALID    0xFF
+#define CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES   0x04U
+#define CTRL_PMGR_PWR_EQUATION_INDEX_INVALID    0xFFU
 
 #define VOLT_GET_VOLT_RAIL(pvolt, rail_idx)     \
         ((struct voltage_rail *)BOARDOBJGRP_OBJ_GET_BY_IDX( \