diff options
author | Richard Zhao <rizhao@nvidia.com> | 2016-07-21 19:56:15 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:19 -0500 |
commit | a862dd612204813b603dd0c07442488f47c50448 (patch) | |
tree | 988a73515a2a05479f015fb5c8077d70306df6db /drivers/gpu/nvgpu/vgpu | |
parent | c0cbc337cad85ea962f433366290fa6e84df1244 (diff) |
gpu: nvgpu: vgpu: move to use vgpu_get_handle helper function
JIRA VFND-2103
Change-Id: Ic11cff40e64849cb6abb193bec54d03857433416
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1185205
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c | 5 |
2 files changed, 5 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c index 3194fff1..78205afb 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c | |||
@@ -20,7 +20,6 @@ | |||
20 | static void vgpu_gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm, | 20 | static void vgpu_gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm, |
21 | struct gr_ctx_desc *gr_ctx) | 21 | struct gr_ctx_desc *gr_ctx) |
22 | { | 22 | { |
23 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); | ||
24 | struct tegra_vgpu_cmd_msg msg = {0}; | 23 | struct tegra_vgpu_cmd_msg msg = {0}; |
25 | struct tegra_vgpu_gr_ctx_params *p = &msg.params.gr_ctx; | 24 | struct tegra_vgpu_gr_ctx_params *p = &msg.params.gr_ctx; |
26 | int err; | 25 | int err; |
@@ -31,7 +30,7 @@ static void vgpu_gr_gp10b_free_gr_ctx(struct gk20a *g, struct vm_gk20a *vm, | |||
31 | return; | 30 | return; |
32 | 31 | ||
33 | msg.cmd = TEGRA_VGPU_CMD_GR_CTX_FREE; | 32 | msg.cmd = TEGRA_VGPU_CMD_GR_CTX_FREE; |
34 | msg.handle = platform->virt_handle; | 33 | msg.handle = vgpu_get_handle(g); |
35 | p->gr_ctx_handle = gr_ctx->virt_ctx; | 34 | p->gr_ctx_handle = gr_ctx->virt_ctx; |
36 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | 35 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); |
37 | WARN_ON(err || msg.ret); | 36 | WARN_ON(err || msg.ret); |
@@ -52,7 +51,6 @@ static int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g, | |||
52 | u32 class, | 51 | u32 class, |
53 | u32 flags) | 52 | u32 flags) |
54 | { | 53 | { |
55 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); | ||
56 | struct tegra_vgpu_cmd_msg msg = {0}; | 54 | struct tegra_vgpu_cmd_msg msg = {0}; |
57 | struct tegra_vgpu_gr_bind_ctxsw_buffers_params *p = | 55 | struct tegra_vgpu_gr_bind_ctxsw_buffers_params *p = |
58 | &msg.params.gr_bind_ctxsw_buffers; | 56 | &msg.params.gr_bind_ctxsw_buffers; |
@@ -162,7 +160,7 @@ static int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g, | |||
162 | 160 | ||
163 | if (gr_ctx->graphics_preempt_mode || gr_ctx->compute_preempt_mode) { | 161 | if (gr_ctx->graphics_preempt_mode || gr_ctx->compute_preempt_mode) { |
164 | msg.cmd = TEGRA_VGPU_CMD_CHANNEL_BIND_GR_CTXSW_BUFFERS; | 162 | msg.cmd = TEGRA_VGPU_CMD_CHANNEL_BIND_GR_CTXSW_BUFFERS; |
165 | msg.handle = platform->virt_handle; | 163 | msg.handle = vgpu_get_handle(g); |
166 | p->gr_ctx_handle = gr_ctx->virt_ctx; | 164 | p->gr_ctx_handle = gr_ctx->virt_ctx; |
167 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | 165 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); |
168 | if (err || msg.ret) { | 166 | if (err || msg.ret) { |
@@ -181,7 +179,6 @@ fail: | |||
181 | 179 | ||
182 | static int vgpu_gr_gp10b_init_ctx_state(struct gk20a *g) | 180 | static int vgpu_gr_gp10b_init_ctx_state(struct gk20a *g) |
183 | { | 181 | { |
184 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); | ||
185 | int err; | 182 | int err; |
186 | 183 | ||
187 | gk20a_dbg_fn(""); | 184 | gk20a_dbg_fn(""); |
@@ -190,7 +187,7 @@ static int vgpu_gr_gp10b_init_ctx_state(struct gk20a *g) | |||
190 | if (err) | 187 | if (err) |
191 | return err; | 188 | return err; |
192 | 189 | ||
193 | vgpu_get_attribute(platform->virt_handle, | 190 | vgpu_get_attribute(vgpu_get_handle(g), |
194 | TEGRA_VGPU_ATTRIB_PREEMPT_CTX_SIZE, | 191 | TEGRA_VGPU_ATTRIB_PREEMPT_CTX_SIZE, |
195 | &g->gr.t18x.ctx_vars.preempt_image_size); | 192 | &g->gr.t18x.ctx_vars.preempt_image_size); |
196 | if (!g->gr.t18x.ctx_vars.preempt_image_size) | 193 | if (!g->gr.t18x.ctx_vars.preempt_image_size) |
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c index 1b6003b3..8be6b19c 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Virtualized GPU Memory Management | 2 | * Virtualized GPU Memory Management |
3 | * | 3 | * |
4 | * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -57,7 +57,6 @@ static u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, | |||
57 | int err = 0; | 57 | int err = 0; |
58 | struct device *d = dev_from_vm(vm); | 58 | struct device *d = dev_from_vm(vm); |
59 | struct gk20a *g = gk20a_from_vm(vm); | 59 | struct gk20a *g = gk20a_from_vm(vm); |
60 | struct gk20a_platform *platform = gk20a_get_platform(g->dev); | ||
61 | struct tegra_vgpu_cmd_msg msg; | 60 | struct tegra_vgpu_cmd_msg msg; |
62 | struct tegra_vgpu_as_map_ex_params *p = &msg.params.as_map_ex; | 61 | struct tegra_vgpu_as_map_ex_params *p = &msg.params.as_map_ex; |
63 | struct tegra_vgpu_mem_desc *mem_desc; | 62 | struct tegra_vgpu_mem_desc *mem_desc; |
@@ -149,7 +148,7 @@ static u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, | |||
149 | } | 148 | } |
150 | 149 | ||
151 | msg.cmd = TEGRA_VGPU_CMD_AS_MAP_EX; | 150 | msg.cmd = TEGRA_VGPU_CMD_AS_MAP_EX; |
152 | msg.handle = platform->virt_handle; | 151 | msg.handle = vgpu_get_handle(g); |
153 | p->handle = vm->handle; | 152 | p->handle = vm->handle; |
154 | p->gpu_va = map_offset; | 153 | p->gpu_va = map_offset; |
155 | p->size = size; | 154 | p->size = size; |