summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/vgpu
diff options
context:
space:
mode:
authorDebarshi Dutta <ddutta@nvidia.com>2017-08-03 06:04:44 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-17 17:26:47 -0400
commit98186ec2c2127c2af65a34f9e697e04f518a79ab (patch)
tree08ad87f3bf8c739e96b36f01728a8f7a30749a0e /drivers/gpu/nvgpu/vgpu
parent49dc335cfe588179cbb42d8bab53bc76ba88b28f (diff)
gpu: nvgpu: Add wrapper over atomic_t and atomic64_t
- added wrapper structs nvgpu_atomic_t and nvgpu_atomic64_t over atomic_t and atomic64_t - added nvgpu_atomic_* and nvgpu_atomic64_* APIs to access the above wrappers. JIRA NVGPU-121 Change-Id: I61667bb0a84c2fc475365abb79bffb42b8b4786a Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1533044 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/vgpu')
-rw-r--r--drivers/gpu/nvgpu/vgpu/fifo_vgpu.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
index f1ae2f1f..c8519905 100644
--- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
@@ -43,7 +43,7 @@ static void vgpu_channel_bind(struct channel_gk20a *ch)
43 WARN_ON(err || msg.ret); 43 WARN_ON(err || msg.ret);
44 44
45 wmb(); 45 wmb();
46 atomic_set(&ch->bound, true); 46 nvgpu_atomic_set(&ch->bound, true);
47} 47}
48 48
49static void vgpu_channel_unbind(struct channel_gk20a *ch) 49static void vgpu_channel_unbind(struct channel_gk20a *ch)
@@ -51,7 +51,7 @@ static void vgpu_channel_unbind(struct channel_gk20a *ch)
51 51
52 gk20a_dbg_fn(""); 52 gk20a_dbg_fn("");
53 53
54 if (atomic_cmpxchg(&ch->bound, true, false)) { 54 if (nvgpu_atomic_cmpxchg(&ch->bound, true, false)) {
55 struct tegra_vgpu_cmd_msg msg; 55 struct tegra_vgpu_cmd_msg msg;
56 struct tegra_vgpu_channel_config_params *p = 56 struct tegra_vgpu_channel_config_params *p =
57 &msg.params.channel_config; 57 &msg.params.channel_config;
@@ -425,7 +425,7 @@ static int vgpu_fifo_preempt_channel(struct gk20a *g, u32 chid)
425 425
426 gk20a_dbg_fn(""); 426 gk20a_dbg_fn("");
427 427
428 if (!atomic_read(&ch->bound)) 428 if (!nvgpu_atomic_read(&ch->bound))
429 return 0; 429 return 0;
430 430
431 msg.cmd = TEGRA_VGPU_CMD_CHANNEL_PREEMPT; 431 msg.cmd = TEGRA_VGPU_CMD_CHANNEL_PREEMPT;