gpu:nvgpu: PMU cleanup for ACR

- Removed ACR support code from PMU module
- Deleted ACR related ops from pmu ops
- Deleted assigning of ACR related ops
  using pmu ops during HAL init
-Removed code related to ACR bootstrap &
dependent code for all chips.

JIRA NVGPU-1147

Change-Id: I47a851a6b67a9aacde863685537c34566f97dc8d
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1817990
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 0 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
index 2ec08ae6..56a6b01a 100644
--- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -604,19 +604,12 @@ int vgpu_gp10b_init_hal(struct gk20a *g)
                 /* Add in ops from gm20b acr */
                 gops->pmu.is_pmu_supported = gm20b_is_pmu_supported,
                 gops->pmu.prepare_ucode = prepare_ucode_blob,
-                gops->pmu.pmu_setup_hw_and_bootstrap = gm20b_bootstrap_hs_flcn,
                 gops->pmu.is_lazy_bootstrap = gm20b_is_lazy_bootstrap,
                 gops->pmu.is_priv_load = gm20b_is_priv_load,
-                gops->pmu.get_wpr = gm20b_wpr_info,
-                gops->pmu.alloc_blob_space = gm20b_alloc_blob_space,
                 gops->pmu.pmu_populate_loader_cfg =
                         gm20b_pmu_populate_loader_cfg,
                 gops->pmu.flcn_populate_bl_dmem_desc =
                         gm20b_flcn_populate_bl_dmem_desc,
-                gops->pmu.falcon_wait_for_halt = pmu_wait_for_halt,
-                gops->pmu.falcon_clear_halt_interrupt_status =
-                        clear_halt_interrupt_status,
-                gops->pmu.init_falcon_setup_hw = gm20b_init_pmu_setup_hw1,
 
                 gops->pmu.init_wpr_region = gm20b_pmu_init_acr;
                 gops->pmu.load_lsfalcon_ucode = gp10b_load_falcon_ucode;
@@ -628,12 +621,10 @@ int vgpu_gp10b_init_hal(struct gk20a *g)
                 /* Inherit from gk20a */
                 gops->pmu.is_pmu_supported = gk20a_is_pmu_supported,
                 gops->pmu.prepare_ucode = nvgpu_pmu_prepare_ns_ucode_blob,
-                gops->pmu.pmu_setup_hw_and_bootstrap = gk20a_init_pmu_setup_hw1,
                 gops->pmu.pmu_nsbootstrap = pmu_bootstrap,
 
                 gops->pmu.load_lsfalcon_ucode = NULL;
                 gops->pmu.init_wpr_region = NULL;
-                gops->pmu.pmu_setup_hw_and_bootstrap = gp10b_init_pmu_setup_hw1;
 
                 gops->gr.load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode;
         }